Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 34 for “"Successive Approximation"”.
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ENERGY EFFICIENT CIRCUIT TECHNIQUES FOR SUCCESSIVE APPROXIMATION REGISTER ADC
Charge-scaling (CS) successive approximation register (SAR) ADC's are widely used in the design of low power electronics. Significant portions of CS-SAR ADC power are consumed by CS capacitor arrays and comparator circuits. This Dissertation presents circuit techniques to reduce the power …
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Cmos Design of an 8-Bit 1MS/S Successive Approximation Register ADC
… importance.</p> <p>This thesis presents an 8-bit successive approximation register (SAR) ADC incorporating an asynchronous control logic to avoid external high frequency clock, a dynamic comparator to improve linearity and a differential charger-distribution DAC with a monotonic capacitor …
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Successive-approximation-register based quantizer design for high-speed delta-sigma modulators
… design of high-speed time-interleaved multi-bit successive-approximation-register (SAR) quantizers. Design techniques for high-speed medium-resolution SAR analog-to-digital converters (ADCs) using synchronous SAR logic are proposed. Four-bit and 8-bit 5 GS/s SAR ADCs have been implemented in 65 …
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Application of Precision Successive-approximation-register Analog-to-digital Converters for Digital Root-mean-square Calculation
… Enabled by recent developments in low-power successive approximation register (SAR) analog-to-digital converter (ADC) technology, a digital approach to root-mean-square (RMS) measurement is proposed. The work begins with an explicit accumulation and averaging approach, and a set of …
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Q-Continued Fractions and Related Q-Series
… transformation and by using the method of successive approximation. Also, we prove several continued fractions of Ramanujan which are related to the odd parts of continued fractions.
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Voltage-to-digital converter design
… conversion techniques. One technique, known as"successive approximation,” seems best to satisfy the requirements of the design specifications. The “successive-approximation" voltage-to-digital converter requires that its input voltage be compared to a voltage that is systematically generated …
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Descrição de um conversor analógico-digital de 12 bits.
… converter system. Using components like a successive approximation converter, its main goal is to report a complete, simple, didactic and objective description of the procedures that were part of its development. From the constant observation, checking and simulation of the source code, and …
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Efficient image compression system using a CMOS transform imager
… zero-tree wavelet (EZW) algorithm and the successive approximation vector quantization (SAVQ) algorithm. However, because DIRVQ requires intensive computational complexity, additional focus is placed on the efficient implementation of DIRVQ, and highly efficient implementation is achieved …
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Design of High-Resolution SAR ADC for Detection of Sub-Cortical Neuron Action Potentials for BMI Applications
… and simulation of a high-resolution, low-power successive approximation register (SAR) analog-to-digital converter (ADC) tailored for sub-cortical neural signal detection. To optimize dynamic range and reduce power consumption, a novel adaptive zoom-and-tracking architecture is introduced, …
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An ultra low power ADC for wireless micro-sensor applications
… either 12 or 8 bits. The design is based on the successive approximation register architecture (SAR), which is suitable for scaleable, micro-power operation. Specifically, the number of active blocks has been minimized to allow efficient power-gating, which, in-turn, has been leveraged to …
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Energy-efficient analog-to-digital conversion for ultra-wideband radio
… high-speed (>500MS/s), low-resolution ADCs. The successive approximation register (SAR) topology exhibits significantly reduced complexity compared to the traditional flash architecture. Three time-interleaved SAR ADCs have been implemented. At the mixed-signal optimum energy point, parallelism …
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Design of a low power switched-capacitor pipeline analog-to-digital converter
… rail-to-rail time domain comparator used in successive approximation register ADC (SAR ADC) is implemented and simulated. The simulation results show that the proposed SAR ADC can only consume 1.3 muW with a 0.7 V power supply.</p><p>Finally, a prototype pipeline ADC is implemented and …
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Effect of loaded length on the buckling strength of slender arches
… numerical integration technique combined with a successive approximation procedure which is based on the method developed by Newmark for straight beams and columns and the adaptations made by Austin for arches was used for the analysis. The program developed is very general and is applicable to …
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Design of a Bandgap-Less Temperature Sensor for Achieving High Untrimmed Accuracy
… which are digitized by a bandgap-less successive approximation analog-to-digital converter. The flicker noise is attenuated through autozeroing, which also allows amplifying the thermal noise further. This work demonstrates the design of the first untrimmed closed-loop thermal noise …
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A highly digital, reconfigurable and voltage scalable SAR ADC
… and a scalable sample rate from 0 to 1-MS/s. The successive approximation register (SAR) architecture was chosen for its highly digital nature which enables low voltage operation. The supply voltage can be scaled from 1V down to 0.4V such that the ADC maintains a constant energy efficiency across …
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Integrated Analog Readout Array and Digital Backend for Mobile DNA Sequencing
… a discrete-time (DT) amplifier with in-pixel successive approximation ADCs. The second version (DROICv2) increases throughput density using column-based ADCs. The third version incorporates an asynchronous reset amplifier, further enhancing throughput density by reducing amplifier noise. To …
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Discrete Fractional Calculus and Its Applications to Tumor Growth
… and then the equation is solved by the method of successive approximation. Finally, applications of the theory to tumor and bacterial growth are presented.
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LOW-POWER LOW-VOLTAGE ANALOG CIRCUIT TECHNIQUES FOR WIRELESS SENSORS
… Resistance to Digital Converter (RDC), low power Successive Approximation Register (SAR) Analog to Digital Converter (ADC) with parasitic error reduction and a low power low voltage Low Dropout (LDO) regulator. This dissertation includes a low power analog circuit design for the RFID wireless …
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Variable Precision Tandem Analog-to-Digital Converter (ADC)
… follow the input in real time. It uses Flash and Successive Approximation (SAR) conversion techniques in sequence.</p> <p>As part of the design, the concept of "total real-time optimization" is explored, where any delay at all is treated as an error (Error = Delay * Signal Slew Rate). This error …
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An 8-Bit Analog-to-Digital Converter for Battery Operated Wireless Sensor Nodes
… To achieve these specifications, an 8-bit successive approximation register ADC is developed which has a conversion time of nine clock cycles. This ADC features a charge scaling array included to achieve minimized power consumption and area by reducing unit capacitance in the …
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