Low-Temperature Silicon Thin Films for Large-Area Electronics: Device Fabrication Using Soft Lithography and Laser-Crystallization by Sequential Lateral Solidification

We have analyzed the electrical properties of SLS poly-Si films on oxidized Si wafer using the pseudo-MOSFET geometry; the majority carrier mobility is extracted from the transconductance. However, the data are non-ideal due to large contact resistance and current spreading. We discuss the future use of these electrical characterization techniques to analyze the properties of individual grain boundaries in thin film Si bicrystals formed by SLS.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Materials Science and Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Jin, Hyun-Chul

Contributors dc:contributor

• Abelson, John Robert

• Engineering, Materials Science

Language dc:language

eng

Identifier

(MiAaPQ)AAI3030441

OAI record oai:identifier

https://www.ideals.illinois.edu/oai-pmh?verb=GetRecord&metadataPrefix=etdms&identifier=oai%3Awww.ideals.illinois.edu%3A2142%2F82710