Interfacial Structures of Oxides on GaAs

For the deposited oxide/GaAs work, only deposition of (Ga,Gd)$\sb2$O$\sb3$ oxide among others shows a low interface trap density (D$\rm\sb{it})$ at the oxide-GaAs interface. It is low enough to warrant the demonstration of both n- and p-channel enhancement GaAs MOSFETs. High-resolution transmission electron microscopy (HRTEM) indicates that deposition of MgO, Al$\sb2$O$\sb3$, and Ga$\sb2$O$\sb3$, fail to yield a truly amorphous oxide. Although deposition of SiO$\sb2$ results in an amorphous oxide. There lacks a transition layer between SiO$\sb2$ and GaAs. A correlation between high-low frequency capacitance-voltage (C-V) phenomenon and physical interfacial structure property has been derived by HRTEM. A thin oxide epilayer on GaAs has been identified and proposed as the key factor to solve the surface dangling bond problem. X-ray photoelectron spectroscopy (XPS) and Auger data show that Gd rich in the interface region is the essential part of the good quality MOS devices. It suggest that carefully controlled the initial growth conditions such as substrate temperature, source temperature and oxide growth rate will directly affect the electrical property of the MOSFET.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Chou, Li-Jen

Contributors dc:contributor

• Hsieh, Kuang-Chien

• Engineering, Materials Science

Language dc:language

eng

Identifier

(MiAaPQ)AAI9904410

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/81238