A Sub-0.1-Micron PtSi Schottky Source/drain MOSFET

The devices are fabricated with lightly doped silicon substrates, 19-A to 34-A gate oxide, $\sim$0.05-μum gate lithography, 100-A sidewall oxides, self-aligned PtSi, and no intentional doping. The thin gate and sidewall oxides enable high field emission currents at low voltages. These devices exhibit on-state currents of 200-400 μA/μm and on-off ratios of 20 to 50. Cryogenic refrigeration of the devices reduce the off-state leakage current by several orders of magnitude.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Wang, Chinlee

Contributors dc:contributor

• Tucker, John R.

• Engineering, Electronics and Electrical

Language dc:language

eng

Identifier

(MiAaPQ)AAI9834757

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/81234