Reducing memory access delays in large-scale shared-memory multiprocessors

Memory access time is a key factor limiting the performance of large-scale, shared-memory multiprocessors. In such systems, limited bandwidth in the interconnection between the processors and the memories, coupled with long delays resulting from network and memory conflicts, can produce serious memory access delays. Incorporating memory hierarchies and asynchronous block transfer mechanisms are common methods for reducing these delays. However, for these two mechanisms to be wed advantageously, they must be managed effectively, either in hardware or in software. Although this memory management problem is becoming increasingly important, good techniques are still lacking.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Granston, Elana Denise

Contributors dc:contributor

• Veidenbaum, Alexander V.

• Computer Science

Statement dc:rights

• Copyright 1992 Granston, Elana Denise

Language dc:language

eng

Identifier

AAI9305540
(UMI)AAI9305540

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/23128