Symbolic techniques for VLSI test and diagnosis

Many problems in the domain of digital circuit testing and diagnosis demand the processing of a large number of circuit configurations. Recently, due to the development of binary decision diagrams (BDDs), symbolic methods have become a practical means of handling the large sets encountered in these applications. In this thesis, several algorithms are presented which make use of BDDs to address problems in digital circuit testing and diagnosis.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical and Computer Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Kubiak, Kenneth Edward

Contributors dc:contributor

• Fuchs, W. Kent

• Engineering, Electronics and Electrical
• Computer Science

Statement dc:rights

• Copyright 1994 Kubiak, Kenneth Edward

Language dc:language

eng

Identifier

(UMI)AAI9416388
AAI9416388

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/22776