EMACS: efficient CXL-based memory access counters

This paper presents an efficient solution, EMACS, to count memory accesses for applications utilizing the CXL memory on an FPGA platform. CXL is a promising alternative to the mainstream DDR memory interface that can expand the capacity and bandwidth of a memory system. One type of CXL memory device comes in the form factor of an FPGA with a hard IP, providing extra programmability for its user and thus allowing the implementation of EMACS. EMACS consists of the following 3 key components. 1) A customized hardware logic on the FPGA that fulfills the counting mechanism. 2) A compatible kernel module to handle the communication to the logic. 3) A shell script that automates the control sequence to readily profile the memory accesses for any application. The mechanism and implementation of all three components will be elaborated in this paper, as well as the challenges met in the implementation process. In the end, the outcome of the EMACS tests on several benchmarks will be shown in the form of heatmap graphs.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2024

Author dc:creator

• Yu, Zeduo (Douglas)

Contributors dc:contributor

• Kim, Nam Sung

• Cxl Memory
• Computer Architecture
• Memory Subsystem

Statement dc:rights

• Copyright 2024 Zeduo (Douglas) Yu

Language dc:language

en, eng

Handle dc:identifier

https://hdl.handle.net/2142/124609

OAI record oai:identifier

https://www.ideals.illinois.edu/oai-pmh?verb=GetRecord&metadataPrefix=etdms&identifier=oai%3Awww.ideals.illinois.edu%3A2142%2F124609