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University of Illinois at Urbana-Champaign

An on-chip equivalent-time measurement system for high-speed signals

Abstract

dc:description

This thesis explores the design and implementation of an on-chip measurement system tailored for high-speed integrated circuits and systems. The focus of this research lies in overcoming the limitations posed by traditional off-chip measurement techniques by eliminating analog signal chains between a signal's genesis and the measurement equipment, and providing increased observability for on-chip signals. The proposed system employs an equivalent-time measurement methodology to address these challenges, providing an approach to accurately capture and digitize high-speed signals directly at the source. The significance of in situ measurement is underscored, particularly in the context of die-to-die communication signals, where accurate characterization requires faithful measurement of on-chip signals. By their nature, traditional measurement methodologies fail to achieve this, leading to inaccuracies in signal representation and, consequently, hindering the development and optimization of high-speed integrated circuits. The devised on-chip measurement system is composed of three key blocks: a programmable delay, a programmable voltage source, and a comparator. Leveraging these three components, the system facilitates measurements by sampling signals at programmable time and voltage coordinates from within the integrated circuit itself. This approach aims to mitigate the distortions introduced by off-chip measurements, providing a more faithful representation of the signal behavior in its native on-chip environment. The system's constituent parts have been verified and characterized at the transistor level and imperfections have been incorporated into corresponding behavioral models. The full system functionality has been verified at the behavioral level and post-processing of collected data enable average waveform and statistical eye diagram construction. The system has been designed using Intel's 22nm fin-FET technology.

Degree

thesis:*
Name thesis:degree_name
M.S.
Level thesis:degree_level
Thesis
Discipline thesis:degree_discipline
Electrical & Computer Engr
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2024

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Ng, Andrew C.
Contributors dc:contributor
  • Hanumolu, Pavan K

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • Copyright 2024 Andrew Ng
Language dc:language
en, eng

Identifiers

dc:identifier.*
Handle dc:identifier
https://hdl.handle.net/2142/124599

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Ng, Andrew C.. An on-chip equivalent-time measurement system for high-speed signals. Thesis thesis, University of Illinois at Urbana-Champaign, 2024. https://hdl.handle.net/2142/124599