{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/124599"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/124599","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"An on-chip equivalent-time measurement system for high-speed signals","abstract":"Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2026-05-01","abstract_html":"Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2026-05-01","abstract_has_math":false,"creators":["Ng, Andrew C."],"institution":"University of Illinois at Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Hanumolu, Pavan K"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2024,"date_issued":"2024-05","date_published":"2024-05","updated_at":"2026-07-22T22:25:02Z","subjects":["On-chip Measurement"],"languages":["en","eng"],"rights":["Copyright 2024 Andrew Ng"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/2142/124599","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Hanumolu, Pavan K"]},{"key":"dc:creator","label":"Author","values":["Ng, Andrew C."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2024-05","2024-05-01"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["On-chip Measurement"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en","eng"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2024 Andrew Ng"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://hdl.handle.net/2142/124599"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2026-05-01","The student, Andrew Ng, accepted the attached license on 2024-04-30 at 12:58.","The student, Andrew Ng, submitted this Thesis for approval on 2024-04-30 at 13:52.","This Thesis was approved for publication on 2024-05-01 at 11:54.","DSpace SAF Submission Ingestion Package generated from Vireo submission #20715 on 2024-09-16 at 00:44:53","This thesis explores the design and implementation of an on-chip measurement system tailored for high-speed integrated circuits and systems. The focus of this research lies in overcoming the limitations posed by traditional off-chip measurement techniques by eliminating analog signal chains between a signal's genesis and the measurement equipment, and providing increased observability for on-chip signals. The proposed system employs an equivalent-time measurement methodology to address these challenges, providing an approach to accurately capture and digitize high-speed signals directly at the source. The significance of in situ measurement is underscored, particularly in the context of die-to-die communication signals, where accurate characterization requires faithful measurement of on-chip signals. By their nature, traditional measurement methodologies fail to achieve this, leading to inaccuracies in signal representation and, consequently, hindering the development and optimization of high-speed integrated circuits. The devised on-chip measurement system is composed of three key blocks: a programmable delay, a programmable voltage source, and a comparator. Leveraging these three components, the system facilitates measurements by sampling signals at programmable time and voltage coordinates from within the integrated circuit itself. This approach aims to mitigate the distortions introduced by off-chip measurements, providing a more faithful representation of the signal behavior in its native on-chip environment. The system's constituent parts have been verified and characterized at the transistor level and imperfections have been incorporated into corresponding behavioral models. The full system functionality has been verified at the behavioral level and post-processing of collected data enable average waveform and statistical eye diagram construction. The system has been designed using Intel's 22nm fin-FET technology."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["An on-chip equivalent-time measurement system for high-speed signals"]}]}],"canonical_facts":{"dc:contributor":["Hanumolu, Pavan K"],"dc:creator":["Ng, Andrew C."],"dc:date":["2024-05","2024-05-01"],"dc:description":["Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2026-05-01","The student, Andrew Ng, accepted the attached license on 2024-04-30 at 12:58.","The student, Andrew Ng, submitted this Thesis for approval on 2024-04-30 at 13:52.","This Thesis was approved for publication on 2024-05-01 at 11:54.","DSpace SAF Submission Ingestion Package generated from Vireo submission #20715 on 2024-09-16 at 00:44:53","This thesis explores the design and implementation of an on-chip measurement system tailored for high-speed integrated circuits and systems. The focus of this research lies in overcoming the limitations posed by traditional off-chip measurement techniques by eliminating analog signal chains between a signal's genesis and the measurement equipment, and providing increased observability for on-chip signals. The proposed system employs an equivalent-time measurement methodology to address these challenges, providing an approach to accurately capture and digitize high-speed signals directly at the source. The significance of in situ measurement is underscored, particularly in the context of die-to-die communication signals, where accurate characterization requires faithful measurement of on-chip signals. By their nature, traditional measurement methodologies fail to achieve this, leading to inaccuracies in signal representation and, consequently, hindering the development and optimization of high-speed integrated circuits. The devised on-chip measurement system is composed of three key blocks: a programmable delay, a programmable voltage source, and a comparator. Leveraging these three components, the system facilitates measurements by sampling signals at programmable time and voltage coordinates from within the integrated circuit itself. This approach aims to mitigate the distortions introduced by off-chip measurements, providing a more faithful representation of the signal behavior in its native on-chip environment. The system's constituent parts have been verified and characterized at the transistor level and imperfections have been incorporated into corresponding behavioral models. The full system functionality has been verified at the behavioral level and post-processing of collected data enable average waveform and statistical eye diagram construction. The system has been designed using Intel's 22nm fin-FET technology."],"dc:format":["application/pdf"],"dc:identifier":["https://hdl.handle.net/2142/124599"],"dc:language":["en","eng"],"dc:rights":["Copyright 2024 Andrew Ng"],"dc:subject":["On-chip Measurement"],"dc:title":["An on-chip equivalent-time measurement system for high-speed signals"],"dc:type":["text"],"thesis:degree_discipline":["Electrical & Computer Engr"],"thesis:degree_level":["Thesis"],"thesis:degree_name":["M.S."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:25:02Z"}