Compact model of ESD diode for circuit simulation

This work presents non-quasi-static compact models of P-well and N-well ESD-protection diodes for circuit simulation. The ESD N-well diode model uses a formulation similar to the SPICE Gummel-Poon BJT model to capture the essential BJT effects. The underlying physical basis of the models as well as the parameter extraction methodology are discussed. Diode test structures were fabricated in 65-nm CMOS technology. The measurement results confirm that the models accurately predict the transient behavior of diodes during both turn-on and turn-off.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2022

Author dc:creator

• Huang, Shudong

Contributors dc:contributor

• Rosenbaum, Elyse

• Esd
• Integrated Circuits

Statement dc:rights

• Copyright 2022 Shudong Huang

Language dc:language

en, eng

Handle dc:identifier

https://hdl.handle.net/2142/117690

OAI record oai:identifier

https://www.ideals.illinois.edu/oai-pmh?verb=GetRecord&metadataPrefix=etdms&identifier=oai%3Awww.ideals.illinois.edu%3A2142%2F117690