{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/117690"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/117690","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Compact model of ESD diode for circuit simulation","abstract":"Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-12-01","abstract_html":"Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-12-01","abstract_has_math":false,"creators":["Huang, Shudong"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Rosenbaum, Elyse"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2022,"date_issued":"2022-12","date_published":"2022-12","updated_at":"2026-07-22T22:24:56Z","subjects":["Esd","Integrated Circuits"],"languages":["en","eng"],"rights":["Copyright 2022 Shudong Huang"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/2142/117690","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Rosenbaum, Elyse"]},{"key":"dc:creator","label":"Author","values":["Huang, Shudong"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2022-12","2022-12-09"]},{"key":"dc:type","label":"Dc Type","values":["text","Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Esd","Integrated Circuits"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en","eng"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2022 Shudong Huang"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://hdl.handle.net/2142/117690"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-12-01","The student, Shudong Huang, accepted the attached license on 2022-12-08 at 16:49.","The student, Shudong Huang, submitted this Thesis for approval on 2022-12-08 at 16:55.","This Thesis was approved for publication on 2022-12-09 at 13:03.","DSpace SAF Submission Ingestion Package generated from Vireo submission #18787 on 2023-04-12 at 08:14:49","This work presents non-quasi-static compact models of P-well and N-well ESD-protection diodes for circuit simulation. The ESD N-well diode model uses a formulation similar to the SPICE Gummel-Poon BJT model to capture the essential BJT effects. The underlying physical basis of the models as well as the parameter extraction methodology are discussed. Diode test structures were fabricated in 65-nm CMOS technology. The measurement results confirm that the models accurately predict the transient behavior of diodes during both turn-on and turn-off."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Compact model of ESD diode for circuit simulation"]}]}],"canonical_facts":{"dc:contributor":["Rosenbaum, Elyse"],"dc:creator":["Huang, Shudong"],"dc:date":["2022-12","2022-12-09"],"dc:description":["Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-12-01","The student, Shudong Huang, accepted the attached license on 2022-12-08 at 16:49.","The student, Shudong Huang, submitted this Thesis for approval on 2022-12-08 at 16:55.","This Thesis was approved for publication on 2022-12-09 at 13:03.","DSpace SAF Submission Ingestion Package generated from Vireo submission #18787 on 2023-04-12 at 08:14:49","This work presents non-quasi-static compact models of P-well and N-well ESD-protection diodes for circuit simulation. The ESD N-well diode model uses a formulation similar to the SPICE Gummel-Poon BJT model to capture the essential BJT effects. The underlying physical basis of the models as well as the parameter extraction methodology are discussed. Diode test structures were fabricated in 65-nm CMOS technology. The measurement results confirm that the models accurately predict the transient behavior of diodes during both turn-on and turn-off."],"dc:format":["application/pdf"],"dc:identifier":["https://hdl.handle.net/2142/117690"],"dc:language":["en","eng"],"dc:rights":["Copyright 2022 Shudong Huang"],"dc:subject":["Esd","Integrated Circuits"],"dc:title":["Compact model of ESD diode for circuit simulation"],"dc:type":["text","Thesis"],"thesis:degree_discipline":["Electrical & Computer Engr"],"thesis:degree_level":["Thesis"],"thesis:degree_name":["M.S."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:24:56Z"}