Detection of ESD-induced soft errors

IEC-61000-4-2 compliant ESD discharges are performed on a microcontroller. The effect of ESD-induced noise on a digital system having a workload is examined. UART interface present on-chip is used for memory and register readout. Hardware voltage monitors developed previously are included in the design to report the on-die supply noise. A correlation between the voltage disturbance and soft errors induced is identified. The threshold for such disturbances is found. The results are validated across multiple chips. Memory elements are found to be more immune than registers.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2018

Author dc:creator

• Mysore Vijayaraj, Prajwal

Contributors dc:contributor

• Rosenbaum, Elyse

• Bit flips
• ESD
• microcontroller
• soft errors
• Rail clamp
• Phase margin

Statement dc:rights

• Copyright 2018 Prajwal Mysore Vijayaraj

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/101631

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/101631