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Showing 1 to 20 of 76 for “"Timing analysis"”.
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Distributed timing analysis
… larger, the need to efficiently analyze circuit timing with billions of transistors across multiple modes and corners is quickly becoming the major bottleneck to the overall chip design closure process. To alleviate the long runtimes, recent trends are driving the need of distributed timing …
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Gate-level timing analysis and waveform evaluation
<p>Static timing analysis (STA) is an integral part of modern VLSI chip design. Table lookup based methods are widely used in current industry due to its fast runtime and mature algorithms. Conventional STA algorithms based on table-lookup methods are developed under many assumptions in timing …
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Timing Analysis of Embedded Real -Time Systems
We address the problem of timing constraint derivation and validation for reactive and real-time embedded systems. We assume that such a system is structured into its tasks, and the structure is modeled using a task graph. Our solution uses the timing behavior committed by the environment to the …
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Incremental circuit simulation and timing analysis techniques
… update invalid information than to do a complete analysis if the worst case implication of a design change can be identified efficiently. In our research, we realize that if an algorithm can be carefully decomposed into several independent phases, then some phases may be either totally skipped or …
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Parallel and heterogeneous computing for static timing analysis
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2023-09-01 without embargo terms
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Timing Analysis and Behavioral Synthesis with Process Variation
… with process variation is the need for accurate timing analysis in which process parameters such as gate length and oxide thickness are now modeled as probability density functions (pdf) instead of deterministic quantities. Statistical static timing analysis (SSTA) has emerged to fi ll that void. …
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Functional timing analysis of VLSI circuits containing complex gates
… appropriate physical and computational models. Timing verification targets at determining whether the timing constraints imposed to the design may be satisfied or not. It can be performed by using circuit simulation or by timing analysis. Although simulation tends to furnish the most accurate …
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Two concrete problems in timing analysis of embedded software
Static timing analysis is crucial for the design of real-time embedded systems. Static analysis methods analyze a program statically to give an upper bound on the worst case execution time (WCET) of the program. The problem of determining WCET of a program by static analysis methods has to be …
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Boosting static timing analysis with programming and algorithmic approaches
… demand for faster design closure. As a primary timing measurement tool frequently used in design stage and optimization stage, static timing analysis has become one of the major performance bottlenecks in digital design. We study a novel parallel programming model and algorithm to boost timing …
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Timing analysis in existing and emerging cyber physical systems
… cyber-physical systems is to guarantee timing correctness. The examples of safety- critical systems are avionic, automotive or medical systems in which timing violations could have disastrous effects, from loss of human life to damage to machines and/or the environment. Over the past …
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Photometry and transit-timing analysis for eleven transiting exoplanets
… parameter values are presented. Transit-timing analysis is performed on all systems: CoRoT-2, GJ436, HAT-P-1, HD17156, HD189733, TrES-1, TrES-2, WASP-2, WASP-3, XO-1, XO-2, and XO-3. Transit timing is important both for constraining the orbital period and to search for variations in the …
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Next Generation Frequency Disturbance Recorder Design and Timing Analysis
… solution. With Internet connectivity and GPS timing synchronization, the FDR provides high accuracy frequency, voltage magnitude and voltage angle data to the remote servers. Although the current FDR design is up to the standard in terms of the measurement accuracy and portability, it is of …
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Tutorial on direct digital synthesizer structure improvements and static timing analysis
The direct digital frequency synthesizer (DDS) has been widely used in digital communication systems due to its high frequency resolution, fast frequency conversion, and continuous phase change. With the development of microelectronics technology, field-programmable gate array (FPGA) devices have …
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Computationally efficient characterization of standard cells for statistical static timing analysis
… a computationally efficient statistical static timing analysis (SSTA) technique that addresses intra-die variations at near-threshold to sub-threshold supply voltage, simulated on a scaled 32nm CMOS standard cell library. This technique would characterize the propagation delay and output slew of …
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Worst-Case Timing Analysis of Concurrently Executing DMA I/O and Programs
A cycle-stealing DMA I/O task is allowed to proceed only when the CPU does not need the system bus. As a result, the execution time of a cycle-stealing DMA I/O task is affected by a set of CPU tasks which execute concurrently with the I/O task. We discuss the problem of bounding the WCET of a …
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Functional verification and timing analysis of large digital emitter-coupled logic circuits including voltage regulators
This thesis describes the algorithms implemented in a new digital emitter-coupled logic (ECL) simulation tool called iECLSIM (Illinois ECL SIMulator). From a transistor-level description, we first partition the circuit into blocks at base nodes and voltage source nodes to exploit latency in time …
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Design Optimization Techniques for Time-Critical Cyber-Physical Systems
… applications which are subject to strict timing constraints. To ensure correct timing behavior, much of the effort has been dedicated to the development of validation and verification methods for CPS (e.g., system models and their timing and schedulability analysis). As CPS is becoming …
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Delay Analysis of Digital Circuits Using Prony's Method
… possible applications of Prony's method in timing analysis of digital circuits. Such applications include predicting the future shape of the waveform in DTA(Dynamic Timing Analysis) and delay look-up table in STA(Static Timing Analysis). Given some equally spaced output values, the …
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Electrothermal Simulation and Temperature-Sensitive Reliability Diagnosis for CMOS VLSI Circuits
… electromigration (EM) reliability diagnosis and timing analysis. By considering both transistor and interconnect temperatures, the temperature-sensitive EM-induced mean time-to-failure and critical path timing are estimated and discussed.
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