Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 49 for “"Hardware Description Language"”.
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Verik: Reinterpreting Kotlin as a Hardware Description Language
This work introduces Verik, a hardware description language (HDL) for designing and verifying digital integrated circuits. Verik aims to be a drop-in replacement for SystemVerilog that leverages the productivity gains of the modern software stack to improve engineer productivity. Verik builds upon …
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Implementation of the Intel 486 SX microprocessor in Verilog hardware description language
Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1993.
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Experimental demonstration of cap transmitter using very high speed IC hardware description language (VHDL)
… real time system. Therefore Very High Speed IC Hardware Description Language (VHDL) has been chosen as a method to investigate the modulation of CAP transmitter in real time. This project focused on 2D CAP transmitter implementation in VHDL. The aim of this project is to investigate the CAP …
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Implementation of H.264 Decoder in Bluespec SystemVerilog
… designed in Bluespec SystemVerilog, a high level hardware description language. This design is intended to serve both as a more understandable reference code, as well as a starting point for efficient hardware implementations. I illustrate this by modifying this initial design to meet a …
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The E-algorithm: an automatic test generation algorithm for hardware description languages
… tests for circuits described using the VHDL Hardware Description Language. A fault model has been developed that addresses data path faults, faults in control structures, and faults in functional operators. The E-algorithm is able to generate tests for all modeled fault types, and handles a …
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Micro-operation perturbations in chip level fault modeling
In chip level testing using hardware description language approach, a difficult question to answer is: What is the best micro-operation perturbation for modeling fault at the chip level? In this thesis, an automatic evaluation system is developed to determine the best micro-operation perturbation. …
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An automatic test generation method for chip-level circuit descriptions
… generates tests for circuits described in a hardware description language (HDL). The input description is in a non-procedural subset of VHDL, with a simplified period-oriented timing model. The fault model, based on previous research, includes micro-operation and control statement faults. The …
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Automatic verification of VHDL models
Verification of a model describing a hardware system is very important for modeling and simulation purposes. It is necessary to ensure that the model accurately describes the hardware system. A scheme for the automatic verification of VHDL (VHSIC Hardware Description Language) models has been …
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High Level Synthesis and Evaluation of the Secure Hash Standard for FPGAs
… slow, therefore, acceleration must be done using hardware such as Field Programmable Gate Arrays (FPGAs). Considerable work has been done in academia using FPGAs to accelerate SHAs. These designs were implemented using Hardware Description Language (HDL) based design methodologies, which are …
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High level behavioural modelling of boundary scan architecture.
… (the ASIC) to be described in VHDL-IEEE 1076 Hardware Description Language. The tool consists of the two major elements: i) A parsing and insertion algorithm developed and implemented in 'C'; ii) A high level model of the Boundary Scan Test Architecture implemented in 'VHDL'. The parsing and …
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Design and prototype of an all digital system for baseband FM multiplex signal demodulation
… computation software; implemented in Verilog Hardware Description Language; and tested using the digital to analog converters (DACs) on the Xilinx Spartan-3AN Starter Kit. The oscilloscope images at the end of this report show that the implemented system can successfully demodulate the 19kHz …
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Improving the freshman electrical and computer engineering lab
… a new microcontroller-based board with a pseudo hardware description language is discussed. The new microcontroller based system implementation is extensively detailed along with its new accompanying description language. This new system was tried in several sections of the Fall 2008 semester …
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A Unifying Interface Abstraction for Accelerated Computing in Sensor Nodes
Hardware-software co-design techniques are very suitable to develop the next generation of sensornet applications, which have high computational demands. By making use of a low power FPGA, the peak computational performance of a sensor node can be improved without significant degradation of the …
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The use of VHDL in computer-aided support of life-cycle complete product design
… This research examines the use of the VHSIC Hardware Description Language as a computer-aided engineering tool for life-cycle complete engineering. VHDL is traditionally used to model the functional behavior of digital systems. This thesis provides an overview of a life-cycle complete design …
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Educational applications of partial reconfiguration of FPGAS
… scheme can be implemented without any use of Hardware Description Language (HDL), embedded, and software development design. After implementing these models on an FPGA the results of these implementations are analyzed and compared with the simulation results. The results demonstrate the proper …
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Design and validation of a digital core for wireless communication with RFID-enabled devices
… of the digital core. VHDL (Very High Speed IC Hardware Description Language) was used to design the digital block according to the ISO15693 standard specified for RFID-enabled devices. The developed VHDL code was successfully simulated and the design was transferred onto a CPLD. A test circuit …
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Návrh a implementace opatření proti útokům postranními kanály na platformě FPGA
… FPGA, včetně programovacích jazyků HDL (Hardware Description Language) jako Verilog nebo VHDL. Poté je zde představen obecný přehled o postranních kanálech a jejich typech, opatřeních proti útokům a podrobný popis bezpečnostních technik. Další kapitolou je kryptografické schéma AES a …
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Implementation of Orthogonal Frequency Division Multiplexing with FPGA
… very-high-speed integrated circuits (VHSIC) hardware description language (VHDL) under development environment of ModelSim, and then implemented onto Altera cyclone II EP2C35F672C6. The FFT accuracy is measured by comparing outputs from ModelSim to Matlab. The performance of the developed …
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COMMON MODE VOLTAGE ELIMINATION IN THREE-PHASE FOUR-LEG INVERTERS UTILIZING PULSE DENSITY MODULATION
… control system was converted to Verilog, a hardware description language (HDL) utilizing MATLAB HDL coder in order to control the laboratory prototype via a field-programmable gate array (FPGA). Simulated and experimental results demonstrate that both the unbalanced load requirements in …
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Modeling And Simulation Of Long Term Degradation And Lifetime Of Deep-submicron Mos Device And Circuit
… SpectreRF circuit simulator via Verilog-A HDL (Hardware Description Language). This RF reliability model can be conveniently used to simulate RF circuit performance degradation
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