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Showing 1 to 14 of 14 for “"Device Simulator"”.

  1. A quantum mechanical semiconductor device simulator

    Semiconductor device simulators have generally been based on either classical or semi-classical approaches. In these approaches, the Poisson's equation is solved with either the current continuity equation or the Boltzmann transport equation. Methods based on quantum mechanics have been generally …

    vt Repository record for A quantum mechanical semiconductor device simulator (opens in a new tab)

  2. MIT Device Simulation WebLab : an online simulator for microelectronic devices

    In the field of microelectronics, a device simulator is an important engineering tool with tremendous educational value. With a device simulator, a student can examine the characteristics of a microelectronic device described by a particular model. This makes it easier to develop an intuition for …

    mit Repository record for MIT Device Simulation WebLab : an online simulator for microelectronic devices (opens in a new tab)

  3. A Device-Level FPGA Simulator

    … many tool vendors offer behaviorally-based simulators aimed at easing the complexity of large FPGA designs. At times, a behaviorally-modeled design does not work in hardware as expected or intended. VTsim, a Virtex-II device simulator, was designed to resolve this and many other design …

    vt Repository record for A Device-Level FPGA Simulator (opens in a new tab)

  4. Full band ensemble Monte Carlo simulation of silicon devices

    A Monte Carlo simulator for silicon devices has been developed. The band structure data for this self-consistent device simulator were computed using the empirical pseudopotential method. The ensemble Monte Carlo technique used in the simulations is described in detail. A homogeneous simulator, …

    uiuc Repository record for Full band ensemble Monte Carlo simulation of silicon devices (opens in a new tab)

  5. On the relationship between carrier mobility and velocity in sub-50 mm MOSFETs via calibrated Monte Carlo simulation

    … sub-50 nm NMOSFETs, a 2D full-band Monte Carlo device simulator was calibrated in the regime sensitive to transport parameters. The relationship between electron mobility and high-electric-field velocity at the source-channel potential energy barrier was investigated. The results show a strong …

    mit Repository record for On the relationship between carrier mobility and velocity in sub-50 mm MOSFETs via calibrated Monte Carlo simulation (opens in a new tab)

  6. Simulation of iron impurity gettering in crystalline silicon solar cells

    … (12E) simulation tool and applet. The 12E simulator models the physics of iron impurity gettering in silicon solar cells during high temperature processing. The tool also includes a device simulator to calculate cell performance after processing. By linking input materials, processing, and …

    mit Repository record for Simulation of iron impurity gettering in crystalline silicon solar cells (opens in a new tab)

  7. JHDLBits: An Open-Source Model for FPGA Design Automation

    … connectivity database, and VTsim, a Virtex-II device simulator -- are linked together to provide an integrated design environment. Strategies and philosophies of the open source movement are also examined to successfully establish the support for and involvement of the FPGA research community …

    vt Repository record for JHDLBits: An Open-Source Model for FPGA Design Automation (opens in a new tab)

  8. Full-band Monte Carlo simulation of hot electrons in scaled silicon devices

    "A full-band Monte Carlo device simulator has been used to study the effects of device scaling on hot electrons in different types of n-channel MOSFETs and flash memory structures. A MOSFET with a single source/drain implant, an LDD MOSFET, an SOI MOSFET, and a MOSFET built on top of a heavily …

    uiuc Repository record for Full-band Monte Carlo simulation of hot electrons in scaled silicon devices (opens in a new tab)

  9. Study of subthreshold behavior of FinFet

    … is critically important in the case of submicron devices for the successful design and implementation of digital circuits. Fin Field Effect Transistor (FinFET) is considered to be an alternate MOSFET structure in the deep sub-micron regime. A 3D Poisson equation solver is employed to study the …

    unlv Repository record for Study of subthreshold behavior of FinFet (opens in a new tab)

  10. Monte Carlo Simulation of Silicon Devices Including Quantum Correction and Strain

    The state of the art for full-band Monte Carlo device simulation is advanced on two fronts. First, quantum effects are taken into account by including quantum corrections in the semiclassical Monte Carlo framework. A quantitative study of corrections based on the Wigner transport equation and the …

    uiuc Repository record for Monte Carlo Simulation of Silicon Devices Including Quantum Correction and Strain (opens in a new tab)

  11. Statistical modeling and simulation of variability and reliability of CMOS technology

    … In addition, the relentless downscaling of devices to keep up with Moore's law has significantly increased the time-zero variability caused by Random Dopant Fluctuation, Mean Gate Length Deviation, and Line Edge Roughness. Because of their possible correlation with time dependent aging …

    purdue-thes Repository record for Statistical modeling and simulation of variability and reliability of CMOS technology (opens in a new tab)

  12. Technology for Planar Power Semiconductor Devices Package with Improved Voltage Rating

    The high-voltage SiC power semiconductor devices have been developed in recent years. They cause an urgent in the need for the power semiconductor packaging to have not only low interconnect resistance, less noise, less parasitic oscillations, improved reliability, and better thermal management, …

    vt Repository record for Technology for Planar Power Semiconductor Devices Package with Improved Voltage Rating (opens in a new tab)

  13. NANOSCALE EFFECTS IN JUNCTIONLESS FIELD EFFECT TRANSISTORS

    … it was not possible to fabricate a useful JLFET device, as it requires a very shallow channel region. Very recently, the emergence of new and advanced technologies has made it possible to create viable JLFET devices using nanowires. This work aims to computationally investigate the interplay of …

    siu-theses Repository record for NANOSCALE EFFECTS IN JUNCTIONLESS FIELD EFFECT TRANSISTORS (opens in a new tab)

  14. MODELING QUANTUM AND COULOMB EFFECTS IN NANOSCALE ENHANCEMENT-MODE TRI-GATE III-V MOSFETs

    … strain engineering in extremely scaled silicon devices and a lack of demonstrated gain in performance at the product level in nanowires, nanotubes, graphene, and other exotic channel materials give good reason to continue semiconductor device scaling using high-transport III-V (such as InGaAs …

    siu-theses Repository record for MODELING QUANTUM AND COULOMB EFFECTS IN NANOSCALE ENHANCEMENT-MODE TRI-GATE III-V MOSFETs (opens in a new tab)