Virginia Tech
Fault simulation and test pattern generation for synchronous and asynchronous sequential circuits
Abstract
dc:description.abstractIn this dissertation, we propose two fault simulators, called HOPE and HOPE2, and an autolllatic test pattern generator (ATPG), called ATHENA, for synchronous and asynchronous sequential circuits. HOPE is a parallel fault simulator for synchronous sequential circuits. In HOPE, a packet of 32 faults is simulated in parallel. Several new heuristics are employed in HOPE to accelerate the parallel fault simulation. The heuristics are 1) a reduction of faults to be simulated in parallel, 2) a new fault injection method called functional fault injection, and J) a combination of static and dynamic fault ordering methods. According to our experiments, HOPE is about 2.2 times, on the average, faster than a competing fault simulator, called PROOFS (1]--[2]. for 16 ISCAS89 benchmark circuits [3]. HOPE2 and ATHENA are a fault simulator and an A TPG for asynchronous sequential circuits, respectively. The key idea employed in HOPE2 and ATHENA is 10 transform an asynchronous sequential circuit into a synchronous sequential circuit through remodeling memory elements. We proposed various modeling techniques which transform any asynchronous sequential circuit into a synChronous sequential circuit. Once an asyncllfonous circuit is transformed into a synchronous circuit, various techniques developed for synchronous sequential circuits are employed in HOPE2 and ATHENA. HOPE2 employs the parallel simulation techniques of HOPE. ATHENA employs the back algorithm [4] for test generation, and the parallel fault simulation teChnique for fault simulation. HOPE2 and ATHENA can manage industrial circuits consisting of latches, flip-flops with set/reset, tristate gates, BUS elements, bi-directional I/O pins, mutiplexers, ROMs and RAMs. OUf experimental results on various industrial circuits show that HOPE2 is about two times faster than a commercial fault simulator, the Verifault fault simulator of Cadence, while requiring much smaller memory size. ATHENA also shows high performance for various industrial circuits.
Degree
thesis:*- Name thesis:degree_name
- Ph. D.
- Level thesis:degree_level
- doctoral
- Discipline thesis:degree_discipline
- Electrical Engineering
- Department dc:contributor.department
- Electrical Engineering
- Grantor dc:publisher
- Virginia Tech
- Year dc:date.issued
- 1993
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Lee, Hyung Ki
- Chair dc:contributor.committeechair
-
- Ha, D.S.
- Committee members dc:contributor.committeemember
-
- Armstrong, James R.
- Midkiff, Scott F.
- Shaffer, Clifford A.
- Tront, Joseph G.
Rights
dc:rights- Statement dc:rights
-
- In Copyright
- Licence dc:rights.uri
- Language dc:language.iso
- en
Identifiers
dc:identifier.*- Dc Identifier Other
- etd-06062008-171759
- OAI identifier oai:identifier
- oai:vtechworks.lib.vt.edu:10919/38494