{"id":{"repo_id":"vt","oai_identifier":"oai:vtechworks.lib.vt.edu:10919/38494"},"canonical_url":"https://search.dev.ndltd.org/etd/vt/oai:vtechworks.lib.vt.edu:10919/38494","repository":{"repo_id":"vt","name":"Virginia Tech","base_url":"https://vtechworks.lib.vt.edu/oai/request"},"display":{"title":"Fault simulation and test pattern generation for synchronous and asynchronous sequential circuits","abstract":"In this dissertation, we propose two fault simulators, called HOPE and HOPE2, and an autolllatic test pattern generator (ATPG), called ATHENA, for synchronous and asynchronous sequential circuits. HOPE is a parallel fault simulator for synchronous sequential circuits. In HOPE, a packet of 32 faults is simulated in parallel. Several new heuristics are employed in HOPE to accelerate the parallel fault simulation. The heuristics are 1) a reduction of faults to be simulated in parallel, 2) a new fault injection method called functional fault injection, and J) a combination of static and dynamic fault ordering methods. According to our experiments, HOPE is about 2.2 times, on the average, faster than a competing fault simulator, called PROOFS (1]--[2]. for 16 ISCAS89 benchmark circuits [3]. HOPE2 and ATHENA are a fault simulator and an A TPG for asynchronous sequential circuits, respectively. The key idea employed in HOPE2 and ATHENA is 10 transform an asynchronous sequential circuit into a synchronous sequential circuit through remodeling memory elements. We proposed various modeling techniques which transform any asynchronous sequential circuit into a synChronous sequential circuit. Once an asyncllfonous circuit is transformed into a synchronous circuit, various techniques developed for synchronous sequential circuits are employed in HOPE2 and ATHENA. HOPE2 employs the parallel simulation techniques of HOPE. ATHENA employs the back algorithm [4] for test generation, and the parallel fault simulation teChnique for fault simulation. HOPE2 and ATHENA can manage industrial circuits consisting of latches, flip-flops with set/reset, tristate gates, BUS elements, bi-directional I/O pins, mutiplexers, ROMs and RAMs. OUf experimental results on various industrial circuits show that HOPE2 is about two times faster than a commercial fault simulator, the Verifault fault simulator of Cadence, while requiring much smaller memory size. ATHENA also shows high performance for various industrial circuits.","abstract_html":"In this dissertation, we propose two fault simulators, called HOPE and HOPE2, and an autolllatic test pattern generator (ATPG), called ATHENA, for synchronous and asynchronous sequential circuits. HOPE is a parallel fault simulator for synchronous sequential circuits. In HOPE, a packet of 32 faults is simulated in parallel. Several new heuristics are employed in HOPE to accelerate the parallel fault simulation. The heuristics are 1) a reduction of faults to be simulated in parallel, 2) a new fault injection method called functional fault injection, and J) a combination of static and dynamic fault ordering methods. According to our experiments, HOPE is about 2.2 times, on the average, faster than a competing fault simulator, called PROOFS (1]--[2]. for 16 ISCAS89 benchmark circuits [3]. HOPE2 and ATHENA are a fault simulator and an A TPG for asynchronous sequential circuits, respectively. The key idea employed in HOPE2 and ATHENA is 10 transform an asynchronous sequential circuit into a synchronous sequential circuit through remodeling memory elements. We proposed various modeling techniques which transform any asynchronous sequential circuit into a synChronous sequential circuit. Once an asyncllfonous circuit is transformed into a synchronous circuit, various techniques developed for synchronous sequential circuits are employed in HOPE2 and ATHENA. HOPE2 employs the parallel simulation techniques of HOPE. ATHENA employs the back algorithm [4] for test generation, and the parallel fault simulation teChnique for fault simulation. HOPE2 and ATHENA can manage industrial circuits consisting of latches, flip-flops with set/reset, tristate gates, BUS elements, bi-directional I/O pins, mutiplexers, ROMs and RAMs. OUf experimental results on various industrial circuits show that HOPE2 is about two times faster than a commercial fault simulator, the Verifault fault simulator of Cadence, while requiring much smaller memory size. ATHENA also shows high performance for various industrial circuits.","abstract_has_math":false,"creators":["Lee, Hyung Ki"],"institution":"Virginia Tech","degree_name":"Ph. D.","degree_level":"doctoral","degree_discipline":"Electrical Engineering","degree_department":"Electrical Engineering","school":null,"contributors":[],"advisors":[],"committee_chairs":["Ha, D.S."],"committee_members":["Armstrong, James R.","Midkiff, Scott F.","Shaffer, Clifford A.","Tront, Joseph G."],"year":1993,"date_issued":"1993-12-05","date_published":"1993-12-05","updated_at":"2026-07-22T22:18:57Z","subjects":[],"languages":["en"],"rights":["In Copyright"],"rights_urls":["http://rightsstatements.org/vocab/InC/1.0/"],"identifier_entries":[{"key":"dc:identifier.other","label":"Dc Identifier Other","values":["etd-06062008-171759"],"render_values":[{"text":"etd-06062008-171759","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/10919/38494","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.committeechair","label":"Committee Chair","values":["Ha, D.S."]},{"key":"dc:contributor.committeemember","label":"Committee Member","values":["Armstrong, James R.","Midkiff, Scott F.","Shaffer, Clifford A.","Tront, Joseph G."]},{"key":"dc:contributor.department","label":"Department","values":["Electrical Engineering"]},{"key":"dc:creator","label":"Author","values":["Lee, Hyung Ki"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2014-03-14T21:14:36Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2014-03-14T21:14:36Z","2008-06-06"]},{"key":"dc:date.issued","label":"Date","values":["1993-12-05"]},{"key":"dc:publisher","label":"Institution","values":["Virginia Tech"]},{"key":"dc:type","label":"Dc Type","values":["Dissertation"]},{"key":"dc:type.dcmitype","label":"Dc Type Dcmitype","values":["Text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["doctoral"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph. 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HOPE is a parallel fault simulator for synchronous sequential circuits. In HOPE, a packet of 32 faults is simulated in parallel. Several new heuristics are employed in HOPE to accelerate the parallel fault simulation. The heuristics are 1) a reduction of faults to be simulated in parallel, 2) a new fault injection method called functional fault injection, and J) a combination of static and dynamic fault ordering methods. According to our experiments, HOPE is about 2.2 times, on the average, faster than a competing fault simulator, called PROOFS (1]--[2]. for 16 ISCAS89 benchmark circuits [3]. HOPE2 and ATHENA are a fault simulator and an A TPG for asynchronous sequential circuits, respectively. The key idea employed in HOPE2 and ATHENA is 10 transform an asynchronous sequential circuit into a synchronous sequential circuit through remodeling memory elements. We proposed various modeling techniques which transform any asynchronous sequential circuit into a synChronous sequential circuit. Once an asyncllfonous circuit is transformed into a synchronous circuit, various techniques developed for synchronous sequential circuits are employed in HOPE2 and ATHENA. HOPE2 employs the parallel simulation techniques of HOPE. ATHENA employs the back algorithm [4] for test generation, and the parallel fault simulation teChnique for fault simulation. HOPE2 and ATHENA can manage industrial circuits consisting of latches, flip-flops with set/reset, tristate gates, BUS elements, bi-directional I/O pins, mutiplexers, ROMs and RAMs. OUf experimental results on various industrial circuits show that HOPE2 is about two times faster than a commercial fault simulator, the Verifault fault simulator of Cadence, while requiring much smaller memory size. ATHENA also shows high performance for various industrial circuits."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Ph. D."]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["BTD"]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Fault simulation and test pattern generation for synchronous and asynchronous sequential circuits"]}]}],"canonical_facts":{"dc:contributor.committeechair":["Ha, D.S."],"dc:contributor.committeemember":["Armstrong, James R.","Midkiff, Scott F.","Shaffer, Clifford A.","Tront, Joseph G."],"dc:contributor.department":["Electrical Engineering"],"dc:creator":["Lee, Hyung Ki"],"dc:date.accessioned":["2014-03-14T21:14:36Z"],"dc:date.available":["2014-03-14T21:14:36Z","2008-06-06"],"dc:date.issued":["1993-12-05"],"dc:description.abstract":["In this dissertation, we propose two fault simulators, called HOPE and HOPE2, and an autolllatic test pattern generator (ATPG), called ATHENA, for synchronous and asynchronous sequential circuits. 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We proposed various modeling techniques which transform any asynchronous sequential circuit into a synChronous sequential circuit. Once an asyncllfonous circuit is transformed into a synchronous circuit, various techniques developed for synchronous sequential circuits are employed in HOPE2 and ATHENA. HOPE2 employs the parallel simulation techniques of HOPE. ATHENA employs the back algorithm [4] for test generation, and the parallel fault simulation teChnique for fault simulation. HOPE2 and ATHENA can manage industrial circuits consisting of latches, flip-flops with set/reset, tristate gates, BUS elements, bi-directional I/O pins, mutiplexers, ROMs and RAMs. OUf experimental results on various industrial circuits show that HOPE2 is about two times faster than a commercial fault simulator, the Verifault fault simulator of Cadence, while requiring much smaller memory size. ATHENA also shows high performance for various industrial circuits."],"dc:description.degree":["Ph. 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