FPGA IMPLEMENTATION OF A REALTIME CYCLOSTATIONARY FEATURE DETECTOR FOR OFDM SIGNALS

The demand for wireless connectivity has prompted regulatory authorities in the United States to investigate spectrum sharing of the DSRC band with U-NII operators. However, DSRC operation has public safety implications, and moreover, time-critical requirements due to the vehicular nature of its application. The field of cognitive radio has identified several sensing techniques for the identification of licensed operators in a given band. This thesis explores cyclostationary detection techniques for primary users. A method will be identified for the detection of the 802.11p OFDM modulation used for DSRC communications. A test statistic will be given that is invariant to the signal noise covariance to allow simple and robust operation. Finally, the detection algorithm will be implemented in FPGA digital logic in order to demonstrate the methods ability to be employed in a commercial radio chipset with minimum resource requirements, yet still provide real-time detection.

Name thesis:degree_name

Electrical Engineering

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical and Computer Engineering

Year

2016

Author dc:creator

• Hamlin, Sean

Contributors dc:contributor

• Christodoulou, Christos
• Jayaweera, Sudharman
• Martinez-Ramon, Manel

• Cyclostationary
• OFDM
• FPGA
• DSRC
• 802.11p
• Feature Detector
• SSCCE
• CAF
• Cognitive Radio

Language dc:language

English

Repository record dc:identifier

https://digitalrepository.unm.edu/ece_etds/112

OAI identifier oai:identifier

oai:digitalrepository.unm.edu:ece_etds-1111