Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 59 for “"FPGA implementation"”.
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FPGA Implementation of Blob Recognition
… has been increasing for them. In this thesis, an FPGA-based embedded vision system capable of recognizing objects in real time is presented. The proposed system architecture consists of multiple Intellectual Properties (IPs), which are used as a set of complex instructions by an integrated 32-bit …
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An FPGA implementation of a sleep enabled PON system
Owing to the growing demand for bandwidth-hungry video-on-demand applications, Passive Optical Network (PON) has been widely considered as one of the most promising solutions for broadband access. Environmental concerns motivated network designers to lower energy consumption of optical access …
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FPGA implementation of a Restricted Boltzmann Machine for handwriting recognition
Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2017-05-01
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Soft Computing To Sensor Network Reliability, Systems And Their Fpga Implementation
… of sensor networks (SN) and systems with their FPGA implementation. With an increased importance of security issues, it has become critical to determine reliability of SN. As number of sensor nodes is fairly large in SN, it's rather impractical to adopt traditional reliability evaluation …
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FPGA IMPLEMENTATION OF A REALTIME CYCLOSTATIONARY FEATURE DETECTOR FOR OFDM SIGNALS
… the detection algorithm will be implemented in FPGA digital logic in order to demonstrate the methods ability to be employed in a commercial radio chipset with minimum resource requirements, yet still provide real-time detection.
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An Exploration of the Feasibility of FPGA Implementation of Face Recognition Using Eigenfaces
… Language, they could be implemented in an FPGA. In this thesis we have choose the eigenfaces algorithm, since it is simple and very efficient, this algorithm is first solved analytically, and then the architecture is designed for FPGA implementation. We then develop the Verilog module for …
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An FPGA implementation of multicore, multithreaded powerPC processors with memory subsystem using Bluespec
… of caches and random access memory units. All implementation was done in Bluespec System Verilog hardware synthesis language for placement on FPGA. Furthermore, this document analyzes the main tradeoffs and major challenges involved in building and integrating such a system.
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Design and FPGA Implementation of Optimized and Digital Multiplexing Spiking Encoders for Neuromorphic Computing
… parts. The first focuses on the development and implementation of learning algorithms for spectrum classification using an LSM processor as part of my research work during my master’s study. The second part, as my primary research work, investigates and optimizes the spiking encoding algorithm to …
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FPGA Implementation of a Pseudo-Random Aggregate Spectrum Generator for RF Hardware Test and Evaluation
… this work presents the development of an FPGA-based TandE tool that allows for real-time pseudo-random aggregate signal generation for testing RF receiver hardware (such as communication receivers, spectrum sensors, etc.). In particular, a framework is developed for an FPGA-based …
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Towards real-time high-resolution edge detection: A highly efficient FPGA implementation of the Canny algorithm
Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2026-05-01
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FPGA Implementation and Optimization of Bit Flipping Key Generation Algorithm for Post Quantum Cryptography in Embedded Systems Applications
… inversion, and hashing. These factors limits its FPGA implementation power for embedded and IoT applications. This research work presents a resource-constrained FPGA implementation of BIKE on the Artix-7 FPGA, designed for integration into an IoT temperature sensor system on the STM32 …
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An FPGA implementation of an investigative many-core processor, Fynbos : in support of a Fortran autoparallelising software pipeline
… to match it. Prototyping the design on an FPGA, it is possible to examine the real world performance of the compiler-architecture system to a greater degree than simulation only would allow. Comparing theoretical peak performance and real performance in a case study application, the system …
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Field-programmable gate-array (FPGA) implementation of low-density parity-check (LDPC) decoder in digital video broadcasting - second generation satellite (DVB-S2)
… In this thesis, the design and architecture of a FPGA implementation of an LDPC decoder for the DVB-S2 standard are presented. The decoder architecture is an improvement over others that are published in the current literature. Novel algorithms are devised to use a memory mapping scheme that …
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FPGA Implementations of Elliptic Curve Cryptography and Tate Pairing over Binary Field
… arithmetic units. In this thesis, I propose the FPGA implementations of the elliptic curve point multiplication in GF (2283) as well as Tate pairing computation on supersingular elliptic curve in GF (2283). I have designed and synthesized the elliptic curve point multiplication and Tate pairing …
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A Toolkit for Rapid FPGA System Deployment
FPGA implementation tools have not kept pace with growing FPGA density. It is common for non-trivial designs to take multiple hours to go through the entire FPGA toolflow (synthesis, mapping, placement, routing, bitstream generation). FPGA implementation tool runtime is a major hindrance to FPGA …
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Efficient arithmetic for high speed DSP implementation on FPGAs
… software products and services for the real time implementation of DSP and RF systems. The field programmable gate array (FPGA) is being used increasingly in the field of DSP. This is due to the fact that the parallel computing power of such devices is ideal for today’s truly demanding DSP …
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Matching Genetic Sequences in Distributed Adaptive Computing Systems
… This thesis presents a runtime reconfigurable FPGA implementation of the Smith-Waterman similarity comparison algorithm. Additionally, this thesis presents tools designed for the ACS API that assist developers creating applications in a heterogeneous distributed adaptive computing environment.
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Mixed-precision architecture for flexible neural network accelerators
… ability. Furthermore, this thesis presents an FPGA implementation of this new mixed precision architecture and it discusses the ISA and its associated bitcode compiler. Finally, the performance of the system is evaluated on a Virtex-9 UltraScale FPGA by running state-of-the-art neural networks.
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