An efficient and accurate timing macro-modeling algorithm for large hierarchical designs

Ever-increasing circuit design complexity is driving the need for fast and accurate macro-modeling algorithms to accelerate hierarchical timing. We introduce LibAbs, an effective macro-modeling algorithm that efficiently supports high accuracy, high compression rate, and multi-threading. LibAbs applies tree-based graph reduction techniques to reduce the model size with accuracy values comparable to those of the flat model under a multi-threaded environment. LibAbs outperforms existing tools including the top winners from the TAU 2016 macro-modeling contest in terms of model size, accuracy, and runtime on industry benchmarks. The in-context usage of our abstracted model has also demonstrated promising performance for timing-driven optimizations in large hierarchical designs.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2017

Author dc:creator

• Lai, Tin-Yin

Contributors dc:contributor

• Wong, Martin D. F.

• Timing macro-modeling
• Algorithm
• Timing analysis

Statement dc:rights

• Copyright 2017 Tin-Yin Lai

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/98236

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/98236