Synthesis constraint optimization for near-threshold voltage design

Near-threshold voltage (NTV) design is a viable solution to many embedded systems which require high energy efficiencies and low performances, but it makes them vulnerable to process variation. Increasing the size of devices and/or decreasing the operating frequencies of the systems can be the solutions, but these methods decrease the energy efficiencies which is cancelling out the benefit from NTV. In this work, we test multiple logic synthesis options on openMSP430 microcontroller with TSMC 65nm technology library and suggest the optimal design points to the future IC designers. We find synthesizing the microcontroller with the minimum design constraint gives us the best performance and energy consumption. We also run Monte Carlo simulation to show the estimated yield rate of the suggested design points.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2017

Author dc:creator

• Min, David

Contributors dc:contributor

• Kim, Nam Sung

• Near-threshold voltage
• Low-energy
• Embedded systems

Statement dc:rights

• Copyright 2017 David Min

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/97551

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/97551