Asymmetric interleaving in low-voltage CMOS power management with multiple supply rails

Recent years have seen the proliferation of electronic devices that require multi-phase power converters to provide heterogeneous power rails to different systems. Typical systems will utilize symmetric interleaving as a method of reducing the input current ripple for the power converter. Asymmetric interleaving is a method of control that allows for a further reduction, and in some cases complete cancellation, of this input current ripple. This work looks at some of the challenges for a practical implementation using digital control, and provides results to quantify this improvement. This work demonstrates a control algorithm implementation capable of achieving nearly 3x reduction in the input current ripple via the asymmetric interleaving method.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Ho, Aaron Daniel

Contributors dc:contributor

• Pilawa-Podgurski, Robert C.

• complementary metal–oxide–semiconductor (CMOS) integrated circuits
• digital control
• low-power electronics
• power convertors
• asymmetric interleaving
• heterogeneous power rails
• low voltage complementary metal–oxide–semiconductor (CMOS) power management
• multiphase (complementary metal–oxide–semiconductor) CMOS power management IC system
• multiphase power converters
• multiple supply rails
• reduced input current ripple
• size 180 nm
• Hardware
• Mathematical model
• Prototypes
• Table lookup
• Time-domain analysis

Statement dc:rights

• Copyright 2015 Aaron Daniel Ho

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/88219

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/88219