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University of Illinois at Urbana-Champaign

Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits

Abstract

dc:description

Our experimental results show that our algorithms have good error resolution and run-time performance as they are able to rectify designs with one, two and three errors within minutes of CPU time. In addition, our experiments suggest that diagnosis and correction of multiple design errors with input test-vector simulation is an attractive alternative to symbolic techniques. This makes our test-vector simulation based methods applicable to designs where a symbolic representation might not be available.

Degree

thesis:*
Name thesis:degree_name
Ph.D.
Level thesis:degree_level
Dissertation
Discipline thesis:degree_discipline
Computer Science
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Veneris, Andreas Georgios
Contributors dc:contributor
  • Hajj, Ibrahim N.

Subjects

dc:subject × 1

Rights

Language dc:language
eng

Identifiers

dc:identifier.*
Identifier
(MiAaPQ)AAI9912408
OAI identifier oai:identifier
oai:www.ideals.illinois.edu:2142/81937

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Veneris, Andreas Georgios. Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits. Dissertation thesis, University of Illinois at Urbana-Champaign, 2015. http://hdl.handle.net/2142/81937