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Showing 1 to 12 of 12 for “"design error"”.

  1. Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits

    … results show that our algorithms have good error resolution and run-time performance as they are able to rectify designs with one, two and three errors within minutes of CPU time. In addition, our experiments suggest that diagnosis and correction of multiple design errors with input …

    uiuc Repository record for Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits (opens in a new tab)

  2. Diagnosis and correction of logic design errors

    A CAD tool ACCORD has been developed for design verification and design error correction. ACCORD verifies a gate-level implementation of a design in terms of its functional description. If the functionality of an implementation is incorrect, the tool identifies the error locations and makes …

    uiuc Repository record for Diagnosis and correction of logic design errors (opens in a new tab)

  3. Automatic generation of SDL specifications from MSCs

    … and maintenance, a software system goes through design, implementation and testing phases. The time for developing software systems is crucial. The goal of software teams is to shorten the development time and guarantee the quality of the end product. Formal Description Techniques (FDTs) has been …

    concordia Repository record for Automatic generation of SDL specifications from MSCs (opens in a new tab)

  4. An investigation into error detection and recovery in UK National Health Service screening programmes

    … and recovery of NHS laboratory screening errors. This is done by developing an accident analysis technique that isolates and further analyzes error handling activities, and applying it in four case studies; four recent incidents where laboratory errors in NHS screening programmes resulted …

    glasgow Repository record for An investigation into error detection and recovery in UK National Health Service screening programmes (opens in a new tab)

  5. Design of a single element 3D ultrasound scanner

    … can now be realized. This thesis presents the design, error analysis, and initial image reconstructions from a single element 3D ultrasound tomography system. The system enables volumetric pulse echo or transmission imaging of distal limbs, for applications including: improving prosthetic …

    mit Repository record for Design of a single element 3D ultrasound scanner (opens in a new tab)

  6. An Analysis of the Effect of Environmental and Systems Complexity on Information Systems Failures

    … software complexity, program size and the error rate in each phase of software development life cycle are tested. Interpretations of the hypotheses testing are provided as well. The data shows that analysis error and design error occur more often than programming error. Measurement criteria …

    unt Repository record for An Analysis of the Effect of Environmental and Systems Complexity on Information Systems Failures (opens in a new tab)

  7. Investigating the functionality of the transmembranes in GusB by fusing it with LacY using the polymerase chain reaction.

    … the fusion was successful until a primer design error became evident during restriction digest. This resulted in the primers being redesigned and the PCR was repeated. However, obtaining the fusion since the correction proved difficult and required numerous troubleshoots in which various …

    bournemouth Repository record for Investigating the functionality of the transmembranes in GusB by fusing it with LacY using the polymerase chain reaction. (opens in a new tab)

  8. Design of a hermetically sealed MEMS resonator with electrostatic actuation and capacitive third harmonic sensing

    A microscale beam resonator has been designed and fabricated for use as a modular pressure sensor for vacuum applications. The device dimensions have been optimized to provide measurable signals with low noise. Electrostatic actuation and sensing are both performed using only one pair of …

    mit Repository record for Design of a hermetically sealed MEMS resonator with electrostatic actuation and capacitive third harmonic sensing (opens in a new tab)

  9. Neural Correlates of Error Detection in Math Facts

    … mature strategies and commit more errors than their typically achieving (TA) peers and are less proficient at recognizing when an error has occurred. This study investigated the neural correlates of error detection capabilities in arithmetic problems using a combined behavioral and …

    ohiolink Repository record for Neural Correlates of Error Detection in Math Facts (opens in a new tab)

  10. Characterization and Engineering of Error Statistics for Reliable Computation

    We make a case for developing statistical error models of nanoscale circuits, employing these for designing robust systems, and engineering error-statistics to enhance the performance of various robust design techniques. A simple additive error model is presented for arithmetic computations. The …

    uiuc Repository record for Characterization and Engineering of Error Statistics for Reliable Computation (opens in a new tab)

  11. Statistical error compensation for robust digital signal processing and machine learning

    … are inherently probabilistic and robust to errors, statistical error compensation (SEC) techniques can play a significant role in achieving robust and energy-efficient implementation of these important kernels. SEC embraces the statistical nature of errors and utilizes statistical and …

    uiuc Repository record for Statistical error compensation for robust digital signal processing and machine learning (opens in a new tab)

  12. Design of robust ultra-low power platform for in-silicon machine learning

    … It is therefore of great interest to design embedded ultra-low power (ULP) platforms with in-silicon machine learning capability. A self-contained ULP platform consists of the energy delivery, sensing and information processing subsystems. This dissertation proposes techniques to …

    uiuc Repository record for Design of robust ultra-low power platform for in-silicon machine learning (opens in a new tab)