Loop Scheduling for Multithreaded Processors

We tested MSWP on a Coral 2000 simulator, using several synthetic and SPEC benchmarks. The results we obtained encourage us to continue our research. In particular, we obtained speedups of up to 30% with respect to highly optimized superblock-based schedules on loops with unpredictable branches. We also obtained a speedup of up to 15% on perl, a highly sequential SPEC95 benchmark, utilizing task-level speculation in an attempt to increase the available instruction-level parallelism.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2015

Author dc:creator

• Dimitriou, Georgios

Contributors dc:contributor

• Polychronopoulos, Constantine D.

• Engineering, Electronics and Electrical

Language dc:language

eng

Identifier

(MiAaPQ)AAI9989980

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/81347