{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/81347"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/81347","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Loop Scheduling for Multithreaded Processors","abstract":"We tested MSWP on a Coral 2000 simulator, using several synthetic and SPEC benchmarks. The results we obtained encourage us to continue our research. In particular, we obtained speedups of up to 30% with respect to highly optimized superblock-based schedules on loops with unpredictable branches. We also obtained a speedup of up to 15% on perl, a highly sequential SPEC95 benchmark, utilizing task-level speculation in an attempt to increase the available instruction-level parallelism.","abstract_html":"We tested MSWP on a Coral 2000 simulator, using several synthetic and SPEC benchmarks. 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