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University of Illinois at Urbana-Champaign

Dynamic Optimization in Hardware

Abstract

dc:description

On a broad level, we describe the relationship between well-known compiler optimization concepts and hardware-implemented optimizations. We define and explore two hardware-centric dynamic optimization paradigms: continuous optimization and discrete optimization. Continuous optimization optimizes instructions in the processor pipeline prior to execution. It is primarily useful for reducing processor resource contention and increasing ILP. Discrete optimization captures reusable chunks of the dynamic instruction stream, optimizes them, and then sequences them back into execution. Its primary benefits come from reducing instruction count and increasing ILP. The benefits of these two models are mostly orthogonal, and, therefore, they can be combined to provide larger improvements than either approach could provide by itself.

Degree

thesis:*
Name thesis:degree_name
Ph.D.
Level thesis:degree_level
Dissertation
Discipline thesis:degree_discipline
Electrical Engineering
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Fahs, Brian Matthew
Contributors dc:contributor
  • Patel, Sanjay J.
  • Lumetta, Steven S.

Subjects

dc:subject × 1

Rights

Language dc:language
eng

Identifiers

dc:identifier.*
Identifier
(MiAaPQ)AAI3202089
OAI identifier oai:identifier
oai:www.ideals.illinois.edu:2142/80944

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Fahs, Brian Matthew. Dynamic Optimization in Hardware. Dissertation thesis, University of Illinois at Urbana-Champaign, 2015. http://hdl.handle.net/2142/80944