Back to results

University of Illinois at Urbana-Champaign

Early Power Estimation for VLSI Circuits

Abstract

dc:description

Power estimation for register files at the microarchitectural level requires predictions of activity and capacitance of power hungry nodes in the register file. Both of these predictors are developed in this research, thus making it possible to estimate power for multiported, pipelined register files at the microarchitectural level.

Degree

thesis:*
Name thesis:degree_name
Ph.D.
Level thesis:degree_level
Dissertation
Discipline thesis:degree_discipline
Electrical Engineering
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Buyuksahin, Kavel M.
Contributors dc:contributor
  • Farid N. Najm

Subjects

dc:subject × 1

Rights

Language dc:language
eng

Identifiers

dc:identifier.*
Identifier
(MiAaPQ)AAI3086027
OAI identifier oai:identifier
oai:www.ideals.illinois.edu:2142/80817

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Buyuksahin, Kavel M.. Early Power Estimation for VLSI Circuits. Dissertation thesis, University of Illinois at Urbana-Champaign, 2015. http://hdl.handle.net/2142/80817