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University of Illinois at Urbana-Champaign

Fault-Tolerant Multiprocessor Interconnection Networks and Their Fault-Diagnoses

Abstract

dc:description

Interconnection networks have long been recognized as one of the key issues in designing a multiprocessor. A new scheme to provide multistage interconnection networks with fault-tolerance is introduced. Multiple paths between any input/output pair are created by connecting switching elements in the same stage together. The fault-tolerant interconnection network is investigated in both its reliability and its performance. Because the maximum number of possible alternative paths inherent in a network is exploited, the proposed fault-tolerant network possesses long mean lifetime and demonstrates high bandwidth. This scheme can be applied to notably enhance reliability and performance of any known multistage interconnection networks.

Degree

thesis:*
Name thesis:degree_name
Ph.D.
Level thesis:degree_level
Dissertation
Discipline thesis:degree_discipline
Computer Science
Grantor
University of Illinois at Urbana-Champaign
Year dc:date
2014

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Tzeng, Nian-Feng

Subjects

dc:subject × 1

Identifiers

dc:identifier.*
Identifier
(UMI)AAI8701640
OAI identifier oai:identifier
oai:www.ideals.illinois.edu:2142/69566

Chain of custody

source
Harvested from
University of Illinois - Urbana-Champaign
Base URL
www.ideals.illinois.edu/oai-pmh
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Tzeng, Nian-Feng. Fault-Tolerant Multiprocessor Interconnection Networks and Their Fault-Diagnoses. Dissertation thesis, University of Illinois at Urbana-Champaign, 2014. http://hdl.handle.net/2142/69566