Methods for Cell Compilation With Constraints (Vlsi, Pla, Routing, Silicon)

One method in solving the VLSI layout problems is a library of standard cells which are used as standard building blocks. Therefore, the design problem is partitioned into two subproblems: (a) decomposition of design into standard cells and (b) placement and routing of standard cells used in the design. The first problem of standard-cell methodology is that library has to be maintained and updated because each cell is usually needed in many different versions. All of them have the same functionality but slightly different in electrical charateristics (time delay, power consumption), geometrical characteristics (height, width) and the position of each input/output. The solution to this problem is a library of parametrized cells.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2014

Author dc:creator

• Lursinsap, Chidchanok

• Computer Science

Identifier

(UMI)AAI8623360

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/69552