Testing and Error Detection in Iterative Logic Arrays

The test methods of general iterative logic arrays (ILAs) composed of combinational cells are considered in the first part of this report. The fault model assumed is that faults in a cell can change a cell behavior in any arbitrary way, as long as the cell remains a combinational circuit. At the array level, two fault-models are considered: in the single cell fault-model (SCFM) we assume only one cell can be faulty; and in the multiple cell fault-model (MCFM) we assume any number of cells can be faulty. Previous papers have solved the testing problems of C-testable and linear testable unilateral one-dimensional (1-D) ILAs under SCFM. The necessary and sufficient condition of a test set in unilateral 1-D ILAs under MCFM is derived here. With this condition, two procedures that can generate near-minimum test sets for linear testable and C-testable unilateral 1-D ILAs respectively are proposed. Furthermore, the results are extended to generate test sets for bilateral 1-D ILAs, unilateral tree-structured ILAs and unilateral two-dimensional ILAs under SCFM and MCFM. Finally, improving all the testing methods to cover sequential faults are proposed.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

1985

Author dc:creator

• Cheng, Wu-Tung

• Computer Science

Identifier

(UMI)AAI8600148

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/69545