Algorithms for Logic Design Automation (Rtcad, Synthesis)

As the complexity of logic circuits which may be placed on an integrated circuit grows, the complexity and length of the design process increases also. Consequently, there have been increased efforts in recent years directed at developing tools to ease design tasks, mostly the physical tasks such as layout and routing. For low volume applications of integrated circuits, where the design costs may greatly exceed the production costs for the production lifetime of the integrated circuit, and especially if the same basic architecture is needed for several designs, it is economically justifiable to develop design tools which are able to produce semi-automatically an integrated circuit which corresponds to a high level behavioral description of a logic circuit. This thesis describes a collection of algorithms that transform a graph data structure derived from a behavior description into a logic design at the register transfer level.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2014

Author dc:creator

• Casavant, Albert Ernest

• Computer Science

Identifier

(UMI)AAI8511593

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/69540