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University of Illinois at Urbana-Champaign
Piecewise Linear Approach for Timing Simulation of VLSI Circuits on Serial and Parallel Computers
Abstract
dc:descriptionThe work presented in this thesis deals with the development of a fast and fairly accurate Computer Aided Design software for simulating very-large-scale-integrated (VLSI) circuits. The methods rely on piecewise linearized nonlinear elements in the circuits.
Degree
thesis:*- Name thesis:degree_name
- Ph.D.
- Level thesis:degree_level
- Dissertation
- Discipline thesis:degree_discipline
- Electrical Engineering
- Grantor
- University of Illinois at Urbana-Champaign
- Year dc:date
- 2014
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Tejayadi, Ongky
- Contributors dc:contributor
-
- Hajj, Ibrahim N.
Subjects
dc:subject × 2Identifiers
dc:identifier.*- Identifier
- (UMI)AAI8815430
- OAI identifier oai:identifier
- oai:www.ideals.illinois.edu:2142/69391