Monte Carlo simulation for high-frequency intrinsic noise analysis of MOSFET

This thesis introduces a Monte Carlo simulation of intrinsic electronic noise in MOSFETs. Brief reviews of the important aspects of carrier transport, band structure, and Monte Carlo technique are discussed. Based on full band 2D Monte Carlo simulation, a noise analysis platform is utilized. To this end, accurate calculation of instantaneous current is done by employing the Ramo-Shockley technique. Then, we extract Y-parameters that include the information about the noise in a device. From these Y-parameters, we calculate the parameters of the small signal equivalent circuit model and finally model our device into noise two-port model. A 30 nm double gate FinFET is chosen as a simulation model and the intrinsic noise of the device is examined. As a result, the double gate FinFET showed lower gate and source access resistance, and minimum noise figure, which contains important information about the intrinsic noise characteristic.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2013

Author dc:creator

• Jo, Michael

Contributors dc:contributor

• Ravaioli, Umberto

• Monte Carlo simulation
• intrinsic noise
• metal–oxide–semiconductor field-effect transistor (MOSFET)

Statement dc:rights

• Copyright 2013 Michael Jo

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/45626

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/45626