System-level optimization of the DC-DC voltage regulator and core for sub/near-threshold voltage operation

Switched capacitor voltage regulator module (SC-VRM) is suitable for low power embedded systems operating in near/sub-threshold region due to its high conversion ratio and compactness. However, existing optimization for SC-VRM is separated from the embedded core design and therefore leads to sub-optimal system energy efficiency. In this thesis, we propose to jointly optimize the switched capacitor voltage regulator module (SC-VRM) and the compute core to minimize system energy per instruction. A core-aware SC-VRM energy model is developed and employed to solve the joint optimization problem. We also propose and optimize a reconfigurable SC-VRM architecture. Simulation results in a 130nm CMOS process indicate that the core-aware SC-VRM model predicts energy from circuit simulations to within 5%, and that the proposed approach results in a maximum system energy savings of 8% to 38.9%. The reconfigurable SC-VRM achieves 15% to 52% energy saving as compared to an efficiency-optimized design.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2013

Author dc:creator

• Zhang, Sai

Contributors dc:contributor

• Shanbhag, Naresh R.

• Switched capacitor voltage regulator module
• Sub/near-threshold operation
• Optimization
• Low power design

Statement dc:rights

• Copyright 2012 Sai Zhang

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/42360

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/42360