Asynchronous algorithms for shared memory machines

In an effort to develop more realistic models of computation, we introduce several asynchronous shared memory machines and design asynchronous algorithms for those machines. We first model asynchronous protocols for communication across unreliable channels using finite-state machines communicating via an unreliable shared memory. We establish lower bounds on the size of machines and the number of symbols in the transmission alphabet required to achieve reliable communication. We consider two types of finite-state machines and two fault models for the shared memory. In each case, we show that there are robust protocols for deletion and insertion errors. We also show that there are no robust protocols for mutation errors. In contrast, in the synchronous case, robust protocols exist for all of these types of errors.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical and Computer Engineering

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Wu, Michael M.

Contributors dc:contributor

• Loui, Michael C.

• Engineering, Electronics and Electrical
• Computer Science

Statement dc:rights

• Copyright 1992 Wu, Michael M.

Language dc:language

eng

Identifier

AAI9215910
(UMI)AAI9215910

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/21548