{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/21548"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/21548","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Asynchronous algorithms for shared memory machines","abstract":"In an effort to develop more realistic models of computation, we introduce several asynchronous shared memory machines and design asynchronous algorithms for those machines. We first model asynchronous protocols for communication across unreliable channels using finite-state machines communicating via an unreliable shared memory. We establish lower bounds on the size of machines and the number of symbols in the transmission alphabet required to achieve reliable communication. We consider two types of finite-state machines and two fault models for the shared memory. In each case, we show that there are robust protocols for deletion and insertion errors. We also show that there are no robust protocols for mutation errors. In contrast, in the synchronous case, robust protocols exist for all of these types of errors.","abstract_html":"In an effort to develop more realistic models of computation, we introduce several asynchronous shared memory machines and design asynchronous algorithms for those machines. We first model asynchronous protocols for communication across unreliable channels using finite-state machines communicating via an unreliable shared memory. We establish lower bounds on the size of machines and the number of symbols in the transmission alphabet required to achieve reliable communication. We consider two types of finite-state machines and two fault models for the shared memory. In each case, we show that there are robust protocols for deletion and insertion errors. We also show that there are no robust protocols for mutation errors. In contrast, in the synchronous case, robust protocols exist for all of these types of errors.","abstract_has_math":false,"creators":["Wu, Michael M."],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical and Computer Engineering","degree_department":null,"school":null,"contributors":["Loui, Michael C."],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2011,"date_issued":"2011-05-07T13:11:52Z","date_published":"2011-05-07T13:11:52Z","updated_at":"2026-07-22T22:25:18Z","subjects":["Engineering, Electronics and Electrical","Computer Science"],"languages":["eng"],"rights":["Copyright 1992 Wu, Michael M."],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["AAI9215910","(UMI)AAI9215910"],"render_values":[{"text":"AAI9215910","href":null,"code":true},{"text":"(UMI)AAI9215910","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/2142/21548","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Loui, Michael C."]},{"key":"dc:creator","label":"Author","values":["Wu, Michael M."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2011-05-07T13:11:52Z","2012-09-13T16:36:51Z","1992"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical and Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Engineering, Electronics and Electrical","Computer Science"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 1992 Wu, Michael M."]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["AAI9215910","(UMI)AAI9215910","http://hdl.handle.net/2142/21548"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["In an effort to develop more realistic models of computation, we introduce several asynchronous shared memory machines and design asynchronous algorithms for those machines. We first model asynchronous protocols for communication across unreliable channels using finite-state machines communicating via an unreliable shared memory. We establish lower bounds on the size of machines and the number of symbols in the transmission alphabet required to achieve reliable communication. We consider two types of finite-state machines and two fault models for the shared memory. In each case, we show that there are robust protocols for deletion and insertion errors. We also show that there are no robust protocols for mutation errors. In contrast, in the synchronous case, robust protocols exist for all of these types of errors.","The Parallel Random Access Machine (PRAM) is a fundamental model of parallel computation, but it is not physically realizable. We introduce a more realistic model of parallel computation, the Asynchronous PRAM (APRAM). Let G be a graph with n vertices and m edges. We present two APRAM models and algorithms to find the connected components of G for each model. Algorithm I runs on an APRAM with only atomic read and write primitives and requires O(n log n) rounds. Algorithms II and III run on an APRAM with limited read-modify-write primitives and require O(log n) rounds. Algorithm III is more efficient than Algorithm II and requires fewer global synchronizations. All three algorithms use m + n processors. We then modify our APRAM connected components algorithms to obtain APRAM algorithms for finding a spanning forest or a minimum spanning forest of G.","Finally, we present an APRAM algorithm for finding the biconnected components of a connected graph G. Our biconnected components algorithm runs on an APRAM with limited read-modify-write primitives and requires O(log n) rounds using O(m + n) processors.","Made available in DSpace on 2011-05-07T13:11:52Z (GMT). No. of bitstreams: 2 license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5) 9215910.pdf: 5411975 bytes, checksum: 6e030cf9390e2b77063468aeb5bb4ed7 (MD5) Previous issue date: 1992","Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding (hding2@illinois.edu) on 2011-05-07T14:51:32Z Item is restricted indefinitely.","Item reinstated by Sarah Shreeves (sshreeve@illinois.edu) on 2012-09-13T16:36:50Z Item was in collections: University of Illinois Dissertations and Theses (ID: 204) Dissertations and Theses - Electrical and Computer Engineering (ID: 446) No. of bitstreams: 3 9215910.pdf.txt: 218556 bytes, checksum: dceada09787e37d1090b7536616126b6 (MD5) license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5) 9215910.pdf: 5411975 bytes, checksum: 6e030cf9390e2b77063468aeb5bb4ed7 (MD5)","Item released from any restrictions by Sarah Shreeves (sshreeve@illinois.edu) on 2012-09-13T16:36:51Z per email from author on 2012-09-12 - Michael Wu <michaelmwu@wideopenwest.com>"]},{"key":"dc:title","label":"Title","values":["Asynchronous algorithms for shared memory machines"]}]}],"canonical_facts":{"dc:contributor":["Loui, Michael C."],"dc:creator":["Wu, Michael M."],"dc:date":["2011-05-07T13:11:52Z","2012-09-13T16:36:51Z","1992"],"dc:description":["In an effort to develop more realistic models of computation, we introduce several asynchronous shared memory machines and design asynchronous algorithms for those machines. We first model asynchronous protocols for communication across unreliable channels using finite-state machines communicating via an unreliable shared memory. We establish lower bounds on the size of machines and the number of symbols in the transmission alphabet required to achieve reliable communication. We consider two types of finite-state machines and two fault models for the shared memory. In each case, we show that there are robust protocols for deletion and insertion errors. We also show that there are no robust protocols for mutation errors. In contrast, in the synchronous case, robust protocols exist for all of these types of errors.","The Parallel Random Access Machine (PRAM) is a fundamental model of parallel computation, but it is not physically realizable. We introduce a more realistic model of parallel computation, the Asynchronous PRAM (APRAM). Let G be a graph with n vertices and m edges. We present two APRAM models and algorithms to find the connected components of G for each model. Algorithm I runs on an APRAM with only atomic read and write primitives and requires O(n log n) rounds. Algorithms II and III run on an APRAM with limited read-modify-write primitives and require O(log n) rounds. Algorithm III is more efficient than Algorithm II and requires fewer global synchronizations. All three algorithms use m + n processors. We then modify our APRAM connected components algorithms to obtain APRAM algorithms for finding a spanning forest or a minimum spanning forest of G.","Finally, we present an APRAM algorithm for finding the biconnected components of a connected graph G. Our biconnected components algorithm runs on an APRAM with limited read-modify-write primitives and requires O(log n) rounds using O(m + n) processors.","Made available in DSpace on 2011-05-07T13:11:52Z (GMT). No. of bitstreams: 2 license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5) 9215910.pdf: 5411975 bytes, checksum: 6e030cf9390e2b77063468aeb5bb4ed7 (MD5) Previous issue date: 1992","Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding (hding2@illinois.edu) on 2011-05-07T14:51:32Z Item is restricted indefinitely.","Item reinstated by Sarah Shreeves (sshreeve@illinois.edu) on 2012-09-13T16:36:50Z Item was in collections: University of Illinois Dissertations and Theses (ID: 204) Dissertations and Theses - Electrical and Computer Engineering (ID: 446) No. of bitstreams: 3 9215910.pdf.txt: 218556 bytes, checksum: dceada09787e37d1090b7536616126b6 (MD5) license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5) 9215910.pdf: 5411975 bytes, checksum: 6e030cf9390e2b77063468aeb5bb4ed7 (MD5)","Item released from any restrictions by Sarah Shreeves (sshreeve@illinois.edu) on 2012-09-13T16:36:51Z per email from author on 2012-09-12 - Michael Wu <michaelmwu@wideopenwest.com>"],"dc:identifier":["AAI9215910","(UMI)AAI9215910","http://hdl.handle.net/2142/21548"],"dc:language":["eng"],"dc:rights":["Copyright 1992 Wu, Michael M."],"dc:subject":["Engineering, Electronics and Electrical","Computer Science"],"dc:title":["Asynchronous algorithms for shared memory machines"],"dc:type":["text"],"thesis:degree_discipline":["Electrical and Computer Engineering"],"thesis:degree_level":["Dissertation"],"thesis:degree_name":["Ph.D."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:25:18Z"}