A system for microarchitecture and logic optimization

In recent years the drive to produce more complex integrated circuits while spending less design time has driven the demand for design automation tools. The search for design automation methods has resulted in the design of numerous behavioral synthesis and logic synthesis tools. This thesis spans two levels of the design process by examining optimization at both the register-transfer level and at the logic level. More specifically, this thesis addresses the following two problems: (1) performing logic synthesis for custom layout rather than the traditional approach that focuses on synthesis for standard cells, and (2) performing optimization for custom layout from register-transfer level netlists. Thus optimization is performed on the microarchitecture design and at a lower level for individual microarchitecture components.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Computer Science

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2011

Author dc:creator

• Vander Zanden, Nels Blake

Contributors dc:contributor

• Faiman, Michael

• Computer Science

Statement dc:rights

• Copyright 1991 Vander Zanden, Nels Blake

Language dc:language

eng

Identifier

AAI9136757
(UMI)AAI9136757

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/20427