Latency insertion method for fast high-speed link and IC simulation

This thesis focuses on the Latency Insertion Method (LIM) for high-speed link and IC simulation. LIM is a transient simulation algorithm for circuits. Compared to Modified Nodal Analysis (MNA) methods such as SPICE, LIM exhibits linear computational complexity, which makes it faster than almost all the commercial software, especially for large-scale circuits. For high-speed link simulation, the LIM method for eye diagram simulation are first presented for both situations without and with crosstalk. The proposed method is compared to commercial software to prove that LIM can provide accurate and fast eye diagram simulations. For IC simulation, this thesis focuses on the latest technology that is 3-D FinFET. We presented LIM algorithms for both DC and transient FinFET simulation. By implementing the BSIM-CMG compact model, accurate and fast simulations can be achieved.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2023

Author dc:creator

• Zhou, Yi

Contributors dc:contributor

• Schutt-Ainé, José E.

• Latency Insertion Method
• High-speed Link
• Eye Diagram
• Finfet
• Bsim-cmg

Statement dc:rights

• Copyright 2023 Yi Zhou

Language dc:language

en, eng

Handle dc:identifier

https://hdl.handle.net/2142/121353

OAI record oai:identifier

https://www.ideals.illinois.edu/oai-pmh?verb=GetRecord&metadataPrefix=etdms&identifier=oai%3Awww.ideals.illinois.edu%3A2142%2F121353