Clock distribution network techniques

Clock distribution networks are essential to synchronous systems. The design of these networks affects the system performance dramatically and sometimes determines whether the chip can function properly or not. This thesis first describes in detail how a synchronous system works. Based on the design metrics such as the clock skew requirement and power requirement, different clock distribution network topologies are then presented, including the popular H tree, grid and serpentine structures. Finally, commonly used techniques for improving clock skew, jitter and power are discussed and conclusions are offered.

Name thesis:degree_name

M.S.

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2020

Author dc:creator

• Chen, Shuang

Contributors dc:contributor

• Hanumolu, Pavan Kumar

• clock distribution network
• synchronous system

Statement dc:rights

• Copyright 2020 Shuang Chen

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/108669

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/108669