Dynamic amplifiers for analog-to-digital converters

Advances in CMOS technologies have brought benefits to both digital and analog integrated circuits. However, lower output impedance and reduced supply voltage have also caused newer challenges, especially for the design of operational amplifiers (op-amps) to implement gain. In this dissertation, dynamic/latch-based/regenerative amplifiers are explored where interrupted regeneration is used to implement the gain function. First, a 6-b current-domain interpolating pipelined flash analog-to-digital converter (ADC) is presented, where a novel current-shape-amplifier (CSA) based on a simple dynamic latch stage with interrupted regeneration is used to achieve 16 X interpolation factor using four interpolating stages. Thanks to this larger interpolation factor, ADC input capacitance is greatly reduced, which significantly eases the design of ADC driver circuits. The reduction in ADC throughput that accompanies classical interpolation methods is overcome by pipelining the proposed CSA-based interpolating stages. Fabricated in a 65 nm CMOS process, the prototype ADC consumes 43.8 mW at 1/1.25 V supply and achieves 26.8 dB signal-to-noise and distortion ratio (SNDR) and 35.2 dB spurious-free dynamic range (SFDR) at 4 GS/s with a 2 GHz input. Second, a study is conducted and a fully digital technique is proposed to calibrate the offset of interpolating flash ADCs. Compared to the state-of-the-art, this technique requires fewer comparators and needs fewer sets of input differential pairs. Offset cancellation is achieved by switching references (only during calibration) without extra loading at the input or the clock generator circuitry. The efficacy of this technique is demonstrated by simulating a 4 bit interpolating flash ADC which shows an effective number of bits (ENOB) improvement of 1.5 bits. Third, the non-idealities of the ADC are described and calibration techniques are proposed to improve the performance.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Electrical & Computer Engr

Grantor

University of Illinois at Urbana-Champaign

Year dc:date

2020

Author dc:creator

• Nandi, Timir

Contributors dc:contributor

• Hanumolu, Pavan Kumar
• Banerjee, Arijit
• Schutt-Aine, Jose E
• Zhou, Jin

• dynamic amplifier
• reset gain
• regeneration time
• interpolation
• pipelining
• latch
• flash ADC

Statement dc:rights

• © 2020 Timir Nandi

Language dc:language

en

Handle dc:identifier

http://hdl.handle.net/2142/108557

OAI identifier oai:identifier

oai:www.ideals.illinois.edu:2142/108557