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Showing 1 to 20 of 63 for “"latch"”.

  1. Clock gatting for latch based design

    … no se espera que cambie. Los diseños basados en Latch, que si bien no son tan utilizados como los diseños basados en Flip-Flop debido a sus complejidades adicionales, todavía son utilizados gracias a ciertos beneficios que presentan las restricciones de timing (timing o sincronización) de los …

    chile Repository record for Clock gatting for latch based design (opens in a new tab)

  2. Energy Redistribution with Controllable Binary State Latch Element

    An application of binary state latch device with proper real-time control algorithm for energy redistribution application is introduced in this thesis. Unlike traditional tuned vibration absorber, the latch device can be viewed as variable semi-active dampers such as magnetorheological (MR) and …

    vt Repository record for Energy Redistribution with Controllable Binary State Latch Element (opens in a new tab)

  3. Comparative biomechanics and functional morphology of latch-mediated spring actuated mandibles in ants

    … this limitation many animals have evolved latch-mediated spring actuation (LaMSA) mechanisms that utilize elastic energy storage during a loading phase where movement is restricted by a latch element, followed by a rapid release once this latching element is disengaged. LaMSA powered …

    uiuc Repository record for Comparative biomechanics and functional morphology of latch-mediated spring actuated mandibles in ants (opens in a new tab)

  4. Design and analysis of non-threaded drill pipe connector.

    … and application opportunities of a Snap-Latch Ring design based on the Pin and Box non-threaded connectors design. Modern drill pipes are connected by rotary threaded shouldered connections that have been prone to failure, leading to fatal accidents on the drilling deck. The proposed …

    rgu Repository record for Design and analysis of non-threaded drill pipe connector. (opens in a new tab)

  5. Investigation of system-level ESD-induced failures

    … The second part of this work focuses on latch-up in reverse body biased core circuitry. Latch-up is a phenomenon where parasitic devices within a CMOS structure turn on and stay on, shunting current from power to ground, often causing permanent failure. Latch-up has often been looked at …

    uiuc Repository record for Investigation of system-level ESD-induced failures (opens in a new tab)

  6. Experimental and Computational Methods for Investigating Automotive Door Closure Sounds

    … the same time as specific impact events during latch operation. Sound quality metrics such as loudness and sharpness were used to explore how the impulsive sound relates to a consumer’s impression of the sound. It was suggested in past research that individuals prefer sounds that possess a …

    queens Repository record for Experimental and Computational Methods for Investigating Automotive Door Closure Sounds (opens in a new tab)

  7. Design port and optimization of a high-speed SAR ADC comparator from 65nm to 0.11[mu]M

    … presented here. Additionally, an alternative latch-only architecture for the comparator has been designed and analyzed. In 0.11[mu]m the three-stage comparator operates at the same speed, 13% lower RMS noise contributing 0.9 bits difference, and 11% higher power than the original in 65nm. More …

    mit Repository record for Design port and optimization of a high-speed SAR ADC comparator from 65nm to 0.11[mu]M (opens in a new tab)

  8. The dynamics of ultrafast motion in biological and bio-inspired systems: the case study of click beetles

    … generate such high accelerations using complex latch and spring systems to overcome their muscle force-speed trade-offs and amplify mechanical power output. This dissertation introduces a multi-scale analytical and experimental framework to investigate how extreme accelerations are generated in …

    uiuc Repository record for The dynamics of ultrafast motion in biological and bio-inspired systems: the case study of click beetles (opens in a new tab)

  9. Modeling and numerical methods for power electronic devices

    A scalable I-V model for latch-up in non-collinear PNPN devices is adapted from a previous model for collinear SCR devices. The model is applied to 14-nm FinFET test structures. Layout scaling trends for key latch-up metrics, such as holding and trigger voltage, are captured by the model in circuit …

    uiuc Repository record for Modeling and numerical methods for power electronic devices (opens in a new tab)

  10. Dynamic amplifiers for analog-to-digital converters

    … to implement gain. In this dissertation, dynamic/latch-based/regenerative amplifiers are explored where interrupted regeneration is used to implement the gain function. First, a 6-b current-domain interpolating pipelined flash analog-to-digital converter (ADC) is presented, where a novel …

    uiuc Repository record for Dynamic amplifiers for analog-to-digital converters (opens in a new tab)

  11. Efficacité d'un traitement ostéopathique pour les problématiques biomécaniques de succion des nouveau-nés

    … for the determination of the babies’ ability to latch, the intensity of pain felt by mothers as well as any perceived side effects. Osteopathic lesions were documented in an effort to establish a profile T-tests and Chi-square tests as well as regression models were used to compare groups. …

    sherbrooke Repository record for Efficacité d'un traitement ostéopathique pour les problématiques biomécaniques de succion des nouveau-nés (opens in a new tab)

  12. Insulated gate transistors: characteristics and application to motor control

    … disadvantage of the device was identified as latching and the effect of various factors affecting latching were determined. The experiments performed determined susceptibility to latch under various conditions of temperature, rate of rise of gate-source voltage and rate of fall of drain-source …

    vt Repository record for Insulated gate transistors: characteristics and application to motor control (opens in a new tab)

  13. Static Learning for Problems in VLSI Test and Verification

    … called multi-cycle path delay faults (M-pdf) for latch based designs with multiple clock domains, and propose an implications-based methodology for the identification of untestable M-pdfs for such designs. One of the main bottlenecks in the efficiency of test-pattern-generation (TPG) is the …

    vt Repository record for Static Learning for Problems in VLSI Test and Verification (opens in a new tab)

  14. Reduction of Switching Losses in IGBT Power Modules

    … della tensione possono produrre fenomeni di 'latch-up' in ogni singolo IGBT o commutazioni indesiderate. D'altra parte, commutazioni lente sono caratterizzate da bassi valori di dv/dt e di/dt , causando perdite eccessive specialmente nelle applicazioni di potenza. Pertanto, per affrontare il …

    catania Repository record for Reduction of Switching Losses in IGBT Power Modules (opens in a new tab)

  15. Analysis and Mitigation of Multiple Radiation Induced Errors in Modern Circuits

    … a DNU occurs. In this dissertation, a novel latch design is proposed in which all nodes are capable of fully recovering their correct value after a single or double node upset, referred to as DNU robust. The proposed latch offers lower delay, power consumption and area requirements compared …

    siu-theses Repository record for Analysis and Mitigation of Multiple Radiation Induced Errors in Modern Circuits (opens in a new tab)

  16. ENERGY EFFICIENT CIRCUIT TECHNIQUES FOR SUCCESSIVE APPROXIMATION REGISTER ADC

    … consumption of both CS capacitor array and the latch comparator during ADC operations. The impacts of the proposed techniques on ADC accuracies are analyzed and circuit techniques are presented to address the accuracy concerns. The dissertation also presents techniques to cope with capacitor …

    siu-theses Repository record for ENERGY EFFICIENT CIRCUIT TECHNIQUES FOR SUCCESSIVE APPROXIMATION REGISTER ADC (opens in a new tab)

  17. Laptop Improvisation in a Multi-Dimensional Space

    … can add structural signposts for the listener to latch on to in performance. Specifics of the author's personal approach to this problem, a software environment coded in SuperCollider, are then shared. Lastly, Mihà¡ly Csà­kszentmihà¡lyi's concept of flow psychology is applied to the three stages …

    columbia-diss Repository record for Laptop Improvisation in a Multi-Dimensional Space (opens in a new tab)

  18. Radiation-Hardened Delay-Insensitive Asynchronous Circuits for Multi-Bit SEU Mitigation and Data-Retaining SEL Protection

    … two single-event upsets (SEU) and a single-event latch-up (SEL). The multi-bit SEU mitigation with SEL protection architecture improves the original design by providing more integrity against data corruption and lock-ups caused by multi-bit SEUs, and it is expanded to simultaneously provide …

    arkansas Repository record for Radiation-Hardened Delay-Insensitive Asynchronous Circuits for Multi-Bit SEU Mitigation and Data-Retaining SEL Protection (opens in a new tab)

  19. Microneedle gastric retention for drug delivery

    … I hypothesize that a hooked needle will latch onto the muscularis mucosae layer in the stomach and reside.upwards of a week to deliver drugs. A number of trials and simulations have been designed to test the efficacy of this retention mechanism. Coupled with work in the creation of new …

    mit Repository record for Microneedle gastric retention for drug delivery (opens in a new tab)

  20. Homebound

    … tension. This tension evokes a thrill I like to latch onto. I call this the creative high, the joy felt during the process of creation.

    washington Repository record for Homebound (opens in a new tab)

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