Design of Area-Efficient Integrated Gate Drivers

MOSFET gate drivers are important in modern power electronics due to the ubiquity of applications that require the fast and controlled switching of power MOSFETs. A controller serves as the first building block in many such systems, but with limited drive current and logic level voltage signals, it is unable to directly turn on a discrete power MOSFET. Gate drivers serve as the critical interface between the controller output and the power MOSFET. This thesis explores some of the considerations in designing a gate driver for hardswitching applications and presents a new design for an area-efficient integrated gate driver. Simulation results show that, for a given die area, the new design gives better performance than existing topologies.

Name thesis:degree_name

Master

Department dc:contributor.department

Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2021

Author dc:creator

• Murray, Elizabeth K.

Advisors dc:contributor.advisor

• Perreault, David J.
• Lam, Hylas

Statement dc:rights

• In Copyright - Educational Use Permitted
• Copyright MIT

Licence dc:rights.uri

• http://rightsstatements.org/page/InC-EDU/1.0/

Handle dc:identifier.uri

https://hdl.handle.net/1721.1/139017

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/139017