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A controller serves as the first building block in many such systems, but with limited drive current and logic level voltage signals, it is unable to directly turn on a discrete power MOSFET. Gate drivers serve as the critical interface between the controller output and the power MOSFET. This thesis explores some of the considerations in designing a gate driver for hardswitching applications and presents a new design for an area-efficient integrated gate driver. Simulation results show that, for a given die area, the new design gives better performance than existing topologies."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["M.Eng."]},{"key":"dc:title","label":"Title","values":["Design of Area-Efficient Integrated Gate Drivers"]}]}],"canonical_facts":{"dc:contributor.advisor":["Perreault, David J.","Lam, Hylas"],"dc:contributor.department":["Massachusetts Institute of Technology. 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