Symbolic methods for testing digital circuits

This study investigates the usability of symbolic methods, realized by Boolean Decision Diagrams (BDDs), in the field of testing both combinational and synchronous sequential digital circuits at gate level. <br>Both major topics, fault simulation and automated test pattern generation (ATPG), have been examined, among others, like build-in self-test, computing reset sequences for a sequential circuit, identifying uninitializable memory elements, or computing approximations for signal probabilities for sequential circuits.

Author dc:creator

• Keim, Martin

Contributors dc:contributor

• Becker, Bernd

• Signal Wahrscheinlichkeit
• Signal Probability
• Mixed-Logic Simulation

Repository record source_url

https://freidok.uni-freiburg.de/data/1248

OAI identifier oai:identifier

oai:freidok.uni-freiburg.de:1248