{"id":{"repo_id":"freiburg-diss","oai_identifier":"oai:freidok.uni-freiburg.de:1248"},"canonical_url":"https://search.dev.ndltd.org/etd/freiburg-diss/oai:freidok.uni-freiburg.de:1248","repository":{"repo_id":"freiburg-diss","name":"University of Freiburg","base_url":"https://freidok.uni-freiburg.de/oai/oai2.php"},"display":{"title":"Symbolic methods for testing digital circuits","abstract":"This study investigates the usability of symbolic methods, realized by Boolean Decision Diagrams (BDDs), in the field of testing both combinational and synchronous sequential digital circuits at gate level. <br>Both major topics, fault simulation and automated test pattern generation (ATPG), have been examined, among others, like build-in self-test, computing reset sequences for a sequential circuit, identifying uninitializable memory elements, or computing approximations for signal probabilities for sequential circuits.","abstract_html":"This study investigates the usability of symbolic methods, realized by Boolean Decision Diagrams (BDDs), in the field of testing both combinational and synchronous sequential digital circuits at gate level. &lt;br&gt;Both major topics, fault simulation and automated test pattern generation (ATPG), have been examined, among others, like build-in self-test, computing reset sequences for a sequential circuit, identifying uninitializable memory elements, or computing approximations for signal probabilities for sequential circuits.","abstract_has_math":false,"creators":["Keim, Martin"],"institution":null,"degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":["Becker, Bernd"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":null,"date_issued":"","date_published":null,"updated_at":"2026-07-24T02:22:10Z","subjects":["Signal Wahrscheinlichkeit","Signal Probability","Mixed-Logic Simulation"],"languages":[],"rights":[],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://freidok.uni-freiburg.de/data/1248","outbound_label":"Repository record","outbound_source":"source_url"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Becker, Bernd"]},{"key":"dc:creator","label":"Author","values":["Keim, Martin"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:type","label":"Dc Type","values":["DoctoralThesis"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Signal Wahrscheinlichkeit","Signal Probability","Mixed-Logic Simulation"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["This study investigates the usability of symbolic methods, realized by Boolean Decision Diagrams (BDDs), in the field of testing both combinational and synchronous sequential digital circuits at gate level. <br>Both major topics, fault simulation and automated test pattern generation (ATPG), have been examined, among others, like build-in self-test, computing reset sequences for a sequential circuit, identifying uninitializable memory elements, or computing approximations for signal probabilities for sequential circuits.","Das Ziel dieser Arbeit ist die Untersuchung der Frage ob symbolische Methoden im Bereich des Testens von kombinatorischen und synchronen sequentiellen Schaltungen auf Gatterebene erfolgreich eingesetzt werden können. Dabei basiert die symbolische Representation auf den Boolean Decision Diagrams (BDDs). <br>Es werden Details der jeweiligen Lösungen zu den Gebieten der Fehlersimulation, der Testmustergenerierung und des Selbsttestes vorgestellt. Darüber hinaus werden zwei weitere Routinen, die Resetsequenz Berechnung und die Signalwahrscheinlichkeits-Berechnung, durch symbolische Methoden verbessert."]},{"key":"dc:format.medium","label":"Dc Format Medium","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Symbolic methods for testing digital circuits","Symbolische Methoden für das Testen von digitalen Schaltungen"]}]}],"canonical_facts":{"dc:contributor":["Becker, Bernd"],"dc:creator":["Keim, Martin"],"dc:description.abstract":["This study investigates the usability of symbolic methods, realized by Boolean Decision Diagrams (BDDs), in the field of testing both combinational and synchronous sequential digital circuits at gate level. <br>Both major topics, fault simulation and automated test pattern generation (ATPG), have been examined, among others, like build-in self-test, computing reset sequences for a sequential circuit, identifying uninitializable memory elements, or computing approximations for signal probabilities for sequential circuits.","Das Ziel dieser Arbeit ist die Untersuchung der Frage ob symbolische Methoden im Bereich des Testens von kombinatorischen und synchronen sequentiellen Schaltungen auf Gatterebene erfolgreich eingesetzt werden können. Dabei basiert die symbolische Representation auf den Boolean Decision Diagrams (BDDs). <br>Es werden Details der jeweiligen Lösungen zu den Gebieten der Fehlersimulation, der Testmustergenerierung und des Selbsttestes vorgestellt. Darüber hinaus werden zwei weitere Routinen, die Resetsequenz Berechnung und die Signalwahrscheinlichkeits-Berechnung, durch symbolische Methoden verbessert."],"dc:format.medium":["application/pdf"],"dc:subject":["Signal Wahrscheinlichkeit","Signal Probability","Mixed-Logic Simulation"],"dc:title":["Symbolic methods for testing digital circuits","Symbolische Methoden für das Testen von digitalen Schaltungen"],"dc:type":["DoctoralThesis"]},"updated_at":"2026-07-24T02:22:10Z"}