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Brigham Young University - Provo

Estimating the Dynamic Sensitive Cross Section of an FPGA Design through Fault injection

Abstract

dc:description.abstract

A fault injection tool has been created to emulate single event upset (SEU) behavior within the configuration memory of an FPGA. This tool is able to rapidly and accurately determine the dynamic sensitive cross section of the configuration memory for a given FPGA design. This tool enables the reliability of FPGA designs and fault tolerance schemes to be quickly and accurately tested. The validity of testing performed with this fault injection tool has been confirmed through radiation testing. A radiation test was conducted at Crocker Nuclear Laboratory using a proton accelerator in order to determine the actual dynamic sensitive cross section for specific FPGA designs. The results of this radiation testing were then analyzed and compared with similar fault injection tests, with results suggesting that the fault injection tool behavior is indeed accurate and valid. The fault injection tool can be used to determine the sensitivity of an FPGA design to configuration memory upsets. Additionally, fault mitigation techniques designed to increase the reliability of an FPGA design in spite of upsets within the configuration memory, can be thoroughly tested through fault injection. Fault injection testing should help to increase the feasibility of reconfigurable computing in space. FPGAs are well suited to the computational demands of space based signal processing applications; however, without appropriate mitigation or redundancy techniques, FPGAs are unreliable in a radiation environment. Because the fault injection tool has been shown to reliably model the effects of single event upsets within the configuration memory, it can be used to accurately evaluate the effectiveness of fault tolerance techniques in FPGAs.

Degree

thesis:*
Name thesis:degree_name
MS
Grantor dc:publisher
Brigham Young University - Provo

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Johnson, Darrel E.

Subjects

dc:subject × 12

Rights

Language dc:language
English

Identifiers

dc:identifier.*
Repository record dc:identifier
https://scholarsarchive.byu.edu/etd/308
OAI identifier oai:identifier
oai:scholarsarchive.byu.edu:etd-1307

Chain of custody

source
Harvested from
Brigham Young University
Base URL
scholarsarchive.byu.edu/do/oai/
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

Johnson, Darrel E.. Estimating the Dynamic Sensitive Cross Section of an FPGA Design through Fault injection. Brigham Young University - Provo, https://scholarsarchive.byu.edu/etd/308