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University of Arkansas

Evaluation and Analysis of NULL Convention Logic Circuits

Abstract

dc:description.abstract

<p>Integrated circuit (IC) designers face many challenges in utilizing state-of-the-art technology nodes, such as the increased effects of process variation on timing analysis and heterogeneous multi-die architectures that span across multiple technologies while simultaneously increasing performance and decreasing power consumption. These challenges provide opportunity for utilization of asynchronous design paradigms due to their inherent flexibility and robustness. </p> <p>While NULL Convention Logic (NCL) has been implemented in a variety of applications, current literature does not fully encompass the intricacies of NCL power performance across a variety of applications, technology nodes, circuit scale, and voltage scaling, thereby preventing further adoption and utilization of this design paradigm. </p> <p>This dissertation evaluates the nominal dynamic energy, voltage-scaled dynamic energy, and static power consumption of NCL across variations in circuit type, circuit scale, and technology node, including 130 nm, 90 nm, and 45 nm processes. These results are compared with synchronous counterparts and analyzed for a range of trends in order to identify and quantify advantages and disadvantages of NCL across a variety of applications. By providing an evaluation of a broad range of circuits and characteristics, an IC designer may effectively predict the advantages or disadvantages of an NCL implementation for their application. </p>

Degree

thesis:*
Name thesis:degree_name
Doctor of Philosophy in Engineering (PhD)
Level thesis:degree_level
Dissertation
Year dc:date.available
2019

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Brady, John Davis
Advisor dc:contributor.advisor
  • Di, Jia
Contributors dc:contributor
  • Parkerson, James P.
  • Thompson, Dale R.

Subjects

dc:subject × 9

Identifiers

dc:identifier.*
Repository record dc:identifier
https://scholarworks.uark.edu/etd/3466
OAI identifier oai:identifier
oai:scholarworks.uark.edu:etd-5016

Chain of custody

source
Harvested from
University of Arkansas
Base URL
scholarworks.uark.edu/do/oai/
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

Brady, John Davis. Evaluation and Analysis of NULL Convention Logic Circuits. Dissertation thesis, 2019. https://scholarworks.uark.edu/etd/3466