Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 7 of 7 for “"Asynchronous design"”.
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Null Convention Logic applications of asynchronous design in nanotechnology and cryptographic security
… two Null Convention Logic (NCL) applications of asynchronous logic circuit design in nanotechnology and cryptographic security. The first application is the Asynchronous Nanowire Reconfigurable Crossbar Architecture (ANRCA); the second one is an asynchronous S-Box design for cryptographic system …
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CAD Tool Design for NCL and MTNCL Asynchronous Circuits
… of a method developed to readily convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a …
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Globally-asynchronous, Locally-synchronous Wrapper Configurations For
Globally-Asynchronous, Locally-Synchronous (GALS) design techniques employ the finer points of synchronous and asynchronous design methods to eliminate problems arising due to clock distribution, power dissipation, and large area over head. With the recent rise in the demand for System-on-a-Chip …
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Evaluation and Analysis of NULL Convention Logic Circuits
<p>Integrated circuit (IC) designers face many challenges in utilizing state-of-the-art technology nodes, such as the increased effects of process variation on timing analysis and heterogeneous multi-die architectures that span across multiple technologies while simultaneously increasing …
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Continuous-Time and Companding Digital Signal Processors Using Adaptivity and Asynchronous Techniques
… thesis proposes fundamentally new approaches to designing DSPs, which are different from the classical scheme. The defining characteristic of all new DSPs examined in this thesis is the notion of "adaptivity" or "adaptability." Adaptive DSPs dynamically change their behavior to adjust to some …
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Non-Volatile Memory Adaptation in Asynchronous Microcontroller for Low Leakage Power and Fast Turn-on Time
… Logic (MTNCL) methodology combined with an asynchronous non-volatile magnetic random-access-memory (RAM) to achieve low leakage power and fast turn-on. This asynchronous non-volatile RAM is designed with a Spin-Transfer Torque (STT) memory device model and CMOS transistors in a 65 nm …
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High Temperature CMOS Silicon Carbide Asynchronous Circuit Design
<p>Designing a digital circuit to operate in an extreme temperature range is a challenge with increasing demand for a solution. Large variations in temperature have a distinct impact on electron mobilities causing substantial changes to the threshold voltage of the devices. These physical changes …