Silicon Germanium SRAM and ROM Designs for Wide Temperature Range Space Applications

<p>This thesis presents a design flow from specifications and feature requirements to embeddable blocks of SRAM and ROM designs from 64 bytes to 1 kilobyte that are suitable for lunar environments. The design uses the IBM SiGe 5AM BiCMOS 0.5 micron process for a synchronous memory system capable of operating at a clock frequency of 25 MHz. Radiation mitigation techniques are discussed and implemented to harden the design against total ionizing dose (TID), single-event upset (SEU), and single-event latch-up (SEL). The memory arrays are also designed to operate over the wide temperature range of -180 °C to 125 °C. Design, simulation, and physical layout are evaluated throughout the process. Modeling of the memory arrays for static timing analysis (STA) is done to allow easy integration of the design into a typical RTL design flow. System simulation data is incorporated into block-level simulations to validate the memory timing models. Hardware testing over five iterations of the memory array designs demonstrates the functionality of the design as well as validates the design specifications.</p>

Name thesis:degree_name

Master of Science in Electrical Engineering (MSEE)

Level thesis:degree_level

Thesis

Year dc:date.available

2012

Author dc:creator

• Barlow, Matthew

Advisor dc:contributor.advisor

• Mantooth, H. Alan

Contributors dc:contributor

• Di, Jia
• Smith, Scott C.

• Applied sciences
• ASIC
• SRAM
• VLSI and Circuits, Embedded and Hardware Systems

Repository record dc:identifier

https://scholarworks.uark.edu/etd/362

OAI identifier oai:identifier

oai:scholarworks.uark.edu:etd-1361